Clean-up of cpu_arm920t and cpu_arm920t_s3c24x0 code

This patch re-formats the code in cpu/arm920t and cpu/arm920t/23c24x0 in
preparation for changes to add support for the Embest SBC2440-II Board.

The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
  non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports

It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009

Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets and no
new warnings or errors were found.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

cpu/arm920t/s3c24x0/interrupts.c

@@ -40,7 +40,7 @@
 
 void do_irq (struct pt_regs *pt_regs)
 {
-	S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT();
-	u_int32_t intpnd = irq->INTPND;
+	struct s3c24x0_interrupt *irq = s3c24x0_get_base_interrupt();
+	u_int32_t intpnd = readl(&irq->INTPND);
 
 }

cpu/arm920t/s3c24x0/speed.c

@@ -32,6 +32,8 @@
 #include <common.h>
 #if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB)
 
+#include <asm/io.h>
+
 #if defined(CONFIG_S3C2400)
 #include <s3c2400.h>
 #elif defined(CONFIG_S3C2410)
@@ -53,13 +55,13 @@
 
 static ulong get_PLLCLK(int pllreg)
 {
-    S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+	struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
 	ulong r, m, p, s;
 
 	if (pllreg == MPLL)
-	r = clk_power->MPLLCON;
+		r = readl(&clk_power->MPLLCON);
 	else if (pllreg == UPLL)
-	r = clk_power->UPLLCON;
+		r = readl(&clk_power->UPLLCON);
 	else
 		hang();
 
@@ -67,35 +69,37 @@ static ulong get_PLLCLK(int pllreg)
 	p = ((r & 0x003F0) >> 4) + 2;
 	s = r & 0x3;
 
-    return((CONFIG_SYS_CLK_FREQ * m) / (p << s));
+	return (CONFIG_SYS_CLK_FREQ * m) / (p << s);
 }
 
 /* return FCLK frequency */
 ulong get_FCLK(void)
 {
-    return(get_PLLCLK(MPLL));
+	return get_PLLCLK(MPLL);
 }
 
 /* return HCLK frequency */
 ulong get_HCLK(void)
 {
-    S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+	struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
 
-    return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());
+	return (readl(&clk_power->CLKDIVN) & 2) ? get_FCLK() / 2 : get_FCLK();
 }
 
 /* return PCLK frequency */
 ulong get_PCLK(void)
 {
-    S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+	struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
 
-    return((clk_power->CLKDIVN & 0x1) ? get_HCLK()/2 : get_HCLK());
+	return (readl(&clk_power->CLKDIVN) & 1) ? get_HCLK() / 2 : get_HCLK();
 }
 
 /* return UCLK frequency */
 ulong get_UCLK(void)
 {
-    return(get_PLLCLK(UPLL));
+	return get_PLLCLK(UPLL);
 }
 
-#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */
+#endif /* defined(CONFIG_S3C2400) ||
+	  defined (CONFIG_S3C2410) ||
+	  defined (CONFIG_TRAB) */

cpu/arm920t/s3c24x0/timer.c

@@ -30,7 +30,11 @@
  */
 
 #include <common.h>
-#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB)
+#if defined(CONFIG_S3C2400) || \
+    defined(CONFIG_S3C2410) || \
+    defined(CONFIG_TRAB)
+
+#include <asm/io.h>
 
 #if defined(CONFIG_S3C2400)
 #include <s3c2400.h>
@@ -44,9 +48,9 @@ static ulong timer_clk;
 /* macro to read the 16 bit timer */
 static inline ulong READ_TIMER(void)
 {
-	S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
+	struct s3c24x0_timers *timers = s3c24x0_get_base_timers();
 
-	return (timers->TCNTO4 & 0xffff);
+	return readl(&timers->TCNTO4) & 0xffff;
 }
 
 static ulong timestamp;
@@ -54,13 +58,13 @@ static ulong lastdec;
 
 int timer_init(void)
 {
-	S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
+	struct s3c24x0_timers *timers = s3c24x0_get_base_timers();
+	ulong tmr;
 
 	/* use PWM Timer 4 because it has no output */
 	/* prescaler for Timer 4 is 16 */
-	timers->TCFG0 = 0x0f00;
-	if (timer_load_val == 0)
-	{
+	writel(0x0f00, &timers->TCFG0);
+	if (timer_load_val == 0) {
 		/*
 		 * for 10 ms clock period @ PCLK with 4 bit divider = 1/2
 		 * (default) and prescaler = 16. Should be 10390
@@ -70,11 +74,14 @@ int timer_init (void)
 		timer_clk = get_PCLK() / (2 * 16);
 	}
 	/* load value for 10 ms timeout */
-	lastdec = timers->TCNTB4 = timer_load_val;
+	lastdec = timer_load_val;
+	writel(timer_load_val, &timers->TCNTB4);
 	/* auto load, manual update of Timer 4 */
-	timers->TCON = (timers->TCON & ~0x0700000) | 0x600000;
+	tmr = (readl(&timers->TCON) & ~0x0700000) | 0x0600000;
+	writel(tmr, &timers->TCON);
 	/* auto load, start Timer 4 */
-	timers->TCON = (timers->TCON & ~0x0700000) | 0x500000;
+	tmr = (tmr & ~0x0700000) | 0x0500000;
+	writel(tmr, &timers->TCON);
 	timestamp = 0;
 
 	return (0);
@@ -195,28 +202,29 @@ ulong get_tbclk (void)
  */
 void reset_cpu(ulong ignored)
 {
-	volatile S3C24X0_WATCHDOG * watchdog;
+	struct s3c24x0_watchdog *watchdog;
 
 #ifdef CONFIG_TRAB
-	extern void disable_vfd (void);
-
 	disable_vfd();
 #endif
 
-	watchdog = S3C24X0_GetBase_WATCHDOG();
+	watchdog = s3c24x0_get_base_watchdog();
 
 	/* Disable watchdog */
-	watchdog->WTCON = 0x0000;
+	writel(0x0000, &watchdog->WTCON);
 
 	/* Initialize watchdog timer count register */
-	watchdog->WTCNT = 0x0001;
+	writel(0x0001, &watchdog->WTCNT);
 
 	/* Enable watchdog timer; assert reset at timer timeout */
-	watchdog->WTCON = 0x0021;
+	writel(0x0021, &watchdog->WTCON);
 
-	while(1);	/* loop forever and wait for reset to happen */
+	while (1)
+		/* loop forever and wait for reset to happen */;
 
 	/*NOTREACHED*/
 }
 
-#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */
+#endif /* defined(CONFIG_S3C2400)  ||
+	  defined (CONFIG_S3C2410) ||
+	  defined (CONFIG_TRAB) */

cpu/arm920t/s3c24x0/usb.c

@@ -32,39 +32,41 @@
 # include <s3c2410.h>
 #endif
 
+#include <asm/io.h>
+
 int usb_cpu_init(void)
 {
-
-	S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
-	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+	struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
+	struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
 
 	/*
 	 * Set the 48 MHz UPLL clocking. Values are taken from
 	 * "PLL value selection guide", 6-23, s3c2400_UM.pdf.
 	 */
-	clk_power->UPLLCON = ((40 << 12) + (1 << 4) + 2);
-	gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */
+	writel((40 << 12) + (1 << 4) + 2, &clk_power->UPLLCON);
+	/* 1 = use pads related USB for USB host */
+	writel(readl(&gpio->MISCCR) | 0x8, &gpio->MISCCR);
 
 	/*
 	 * Enable USB host clock.
 	 */
-	clk_power->CLKCON |= (1 << 4);
+	writel(readl(&clk_power->CLKCON) | (1 << 4), &clk_power->CLKCON);
 
 	return 0;
 }
 
 int usb_cpu_stop(void)
 {
-	S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+	struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
 	/* may not want to do this */
-	clk_power->CLKCON &= ~(1 << 4);
+	writel(readl(&clk_power->CLKCON) & ~(1 << 4), &clk_power->CLKCON);
 	return 0;
 }
 
 int usb_cpu_init_fail(void)
 {
-	S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
-	clk_power->CLKCON &= ~(1 << 4);
+	struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
+	writel(readl(&clk_power->CLKCON) & ~(1 << 4), &clk_power->CLKCON);
 	return 0;
 }
 

cpu/arm920t/s3c24x0/usb_ohci.h

@@ -56,13 +56,12 @@ struct ed {
 	struct usb_device *usb_dev;
 	__u32 unused[3];
 } __attribute__ ((aligned(16)));
-typedef struct ed ed_t;
-
 
 /* TD info field */
 #define TD_CC			0xf0000000
-#define TD_CC_GET(td_p)		((td_p >>28) & 0x0f)
-#define TD_CC_SET(td_p, cc)	(td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)
+#define TD_CC_GET(td_p)		(((td_p) >> 28) & 0x0f)
+#define TD_CC_SET(td_p, cc) \
+	{(td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)}
 #define TD_EC			0x0C000000
 #define TD_T			0x03000000
 #define TD_T_DATA0		0x02000000
@@ -113,7 +112,6 @@ struct td {
 
 	__u32 unused2[2];
 } __attribute__ ((aligned(32)));
-typedef struct td td_t;
 
 #define OHCI_ED_SKIP	(1 << 14)
 
@@ -132,7 +130,6 @@ struct ohci_hcca {
 	u8 reserved_for_hc[116];
 } __attribute__ ((aligned(256)));
 
-
 /*
  * Maximum number of root hub ports.
  */
@@ -174,7 +171,6 @@ struct ohci_regs {
 	} roothub;
 } __attribute__ ((aligned(32)));
 
-
 /* OHCI CONTROL AND STATUS REGISTER MASKS */
 
 /*
@@ -221,7 +217,6 @@ struct ohci_regs {
 #define OHCI_INTR_OC	(1 << 30)	/* ownership change */
 #define OHCI_INTR_MIE	(1 << 31)	/* master interrupt enable */
 
-
 /* Virtual Root HUB */
 struct virt_root_hub {
 	int devnum;		/* Address of Root Hub endpoint */
@@ -324,16 +319,16 @@ struct virt_root_hub {
 
 /* urb */
 #define N_URB_TD 48
-typedef struct
-{
-	ed_t *ed;
+struct urb_priv {
+	struct ed *ed;
 	__u16 length;		/* number of tds associated with this request */
 	__u16 td_cnt;		/* number of tds already serviced */
 	int state;
 	unsigned long pipe;
 	int actual_length;
-	td_t *td[N_URB_TD];	/* list pointer to all corresponding TDs associated with this request */
-} urb_priv_t;
+	struct td *td[N_URB_TD];	/* list pointer to all corresponding TDs
+					   associated with this request */
+};
 #define URB_DEL 1
 
 /*
@@ -344,7 +339,7 @@ typedef struct
  */
 
 
-typedef struct ohci {
+struct ohci {
 	struct ohci_hcca *hcca;	/* hcca */
 	/*dma_addr_t hcca_dma; */
 
@@ -355,29 +350,29 @@ typedef struct ohci {
 
 	struct ohci_regs *regs;	/* OHCI controller's memory */
 
-	ed_t *ed_rm_list[2];	/* lists of all endpoints to be removed */
-	ed_t *ed_bulktail;	/* last endpoint of bulk list */
-	ed_t *ed_controltail;	/* last endpoint of control list */
+	struct ed *ed_rm_list[2];  /* lists of all endpoints to be removed */
+	struct ed *ed_bulktail;    /* last endpoint of bulk list */
+	struct ed *ed_controltail; /* last endpoint of control list */
 	int intrstatus;
 	__u32 hc_control;	/* copy of the hc control reg */
 	struct usb_device *dev[32];
 	struct virt_root_hub rh;
 
 	const char *slot_name;
-} ohci_t;
+};
 
 #define NUM_EDS 8		/* num of preallocated endpoint descriptors */
 
 struct ohci_device {
-	ed_t ed[NUM_EDS];
+	struct ed ed[NUM_EDS];
 	int ed_cnt;
 };
 
 /* hcd */
 /* endpoint */
-static int ep_link (ohci_t * ohci, ed_t * ed);
-static int ep_unlink (ohci_t * ohci, ed_t * ed);
-static ed_t *ep_add_ed (struct usb_device *usb_dev, unsigned long pipe);
+static int ep_link(struct ohci *ohci, struct ed *ed);
+static int ep_unlink(struct ohci *ohci, struct ed *ed);
+static struct ed *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe);
 
 /*-------------------------------------------------------------------------*/
 
@@ -385,10 +380,10 @@ static ed_t *ep_add_ed (struct usb_device *usb_dev, unsigned long pipe);
 #define NUM_TD 64
 
 /* +1 so we can align the storage */
-td_t gtd[NUM_TD + 1];
+struct td gtd[NUM_TD + 1];
 
 /* pointers to aligned storage */
-td_t *ptd;
+struct td *ptd;
 
 /* TDs ... */
 static inline struct td *td_alloc(struct usb_device *usb_dev)

cpu/arm920t/start.S

@@ -311,7 +311,8 @@ cpu_init_crit:
 	ldr	r2, _armboot_start
 	sub	r2, r2, #(CONFIG_STACKSIZE)
 	sub	r2, r2, #(CONFIG_SYS_MALLOC_LEN)
-	sub	r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8)  @ set base 2 words into abort stack
+	/* set base 2 words into abort stack */
+	sub	r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8)
 	ldmia	r2, {r2 - r3}			@ get pc, cpsr
 	add	r0, sp, #S_FRAME_SIZE		@ restore sp_SVC
 
@@ -338,14 +339,16 @@ cpu_init_crit:
 	mov	r0, r0
 	ldr	lr, [sp, #S_PC]			@ Get PC
 	add	sp, sp, #S_FRAME_SIZE
-	subs	pc, lr, #4			@ return & move spsr_svc into cpsr
+	/* return & move spsr_svc into cpsr */
+	subs	pc, lr, #4
 	.endm
 
 	.macro get_bad_stack
 	ldr	r13, _armboot_start		@ setup our mode stack
 	sub	r13, r13, #(CONFIG_STACKSIZE)
 	sub	r13, r13, #(CONFIG_SYS_MALLOC_LEN)
-	sub	r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
+	/* reserve a couple spots in abort stack */
+	sub	r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8)
 
 	str	lr, [r13]			@ save caller lr / spsr
 	mrs	lr, spsr