mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-02 01:19:49 +00:00
powerpc/mpc8xxx: disable rcw_en bit for non-DDR3
rcw_en bit is only available for DDR3 controllers. It is a reserved bit on DDR1 and DDR2 controllers. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
parent
634bc55429
commit
4ca3192946
1 changed files with 2 additions and 0 deletions
|
@ -682,7 +682,9 @@ static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr,
|
||||||
| ((obc_cfg & 0x1) << 6)
|
| ((obc_cfg & 0x1) << 6)
|
||||||
| ((ap_en & 0x1) << 5)
|
| ((ap_en & 0x1) << 5)
|
||||||
| ((d_init & 0x1) << 4)
|
| ((d_init & 0x1) << 4)
|
||||||
|
#ifdef CONFIG_FSL_DDR3
|
||||||
| ((rcw_en & 0x1) << 2)
|
| ((rcw_en & 0x1) << 2)
|
||||||
|
#endif
|
||||||
| ((md_en & 0x1) << 0)
|
| ((md_en & 0x1) << 0)
|
||||||
);
|
);
|
||||||
debug("FSLDDR: ddr_sdram_cfg_2 = 0x%08x\n", ddr->ddr_sdram_cfg_2);
|
debug("FSLDDR: ddr_sdram_cfg_2 = 0x%08x\n", ddr->ddr_sdram_cfg_2);
|
||||||
|
|
Loading…
Reference in a new issue