Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2025-02-27 04:47:20 +00:00
Code Issues Projects Releases Packages Wiki Activity

ppc4xx: Netstal HCU4 board. Added POST. Various fixes

Browse source 
- Various fixes
- Reduced rom_size from 384 to 320 kB
- Environment is now in flash
- Added POST
- Support for OF

Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
This commit is contained in:
Niklaus Giger 2008-01-16 18:37:50 +01:00 • committed by Stefan Roese
parent 1a3ac86b79
commit 4bd5036e60
2 changed files with 68 additions and 49 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
board/netstal/hcu4/config.mk
View file

@ -21,7 +21,7 @@
# Netstal Maschinen AG: HCU4 boards # Netstal Maschinen AG: HCU4 boards
# #
TEXT_BASE = 0xFFFa0000 TEXT_BASE = 0xFFFB0000
ifeq ($(debug),1) ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG -g PLATFORM_CPPFLAGS += -DDEBUG -g

115
include/configs/hcu4.h
View file

@ -46,8 +46,8 @@
* Base addresses -- Note these are effective addresses where the * Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses) * actual resources get mapped (not physical addresses)
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CFG_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Monitor */ #define CFG_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */
#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ #define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */ #define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
@ -67,7 +67,7 @@
#define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE #define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE
#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */ #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET #define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Serial Port * Serial Port
@ -82,8 +82,8 @@
* set Linux BASE_BAUD to 403200. * set Linux BASE_BAUD to 403200.
*/ */
#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */ #undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
#undef CONFIG_SERIAL_MULTI /* needed to be able to define #define CONFIG_SERIAL_MULTI 1
CONFIG_SERIAL_SOFTWARE_FIFO */ /* needed to be able to define CONFIG_SERIAL_SOFTWARE_FIFO */
#undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ #undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
#define CFG_BASE_BAUD 691200 #define CFG_BASE_BAUD 691200
@ -100,13 +100,24 @@
#define CFG_BAUDRATE_TABLE \ #define CFG_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
/*-----------------------------------------------------------------------
* Flash
*----------------------------------------------------------------------*/
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CFG_MAX_FLASH_SECT 8 /* max number of sectors on one chip */
#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Environment * Environment
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#undef CFG_ENV_IS_IN_NVRAM #undef CFG_ENV_IS_IN_NVRAM
#undef CFG_ENV_IS_IN_FLASH #define CFG_ENV_IS_IN_FLASH
#define CFG_ENV_IS_IN_EEPROM
#undef CFG_ENV_IS_NOWHERE #undef CFG_ENV_IS_NOWHERE
#ifdef CFG_ENV_IS_IN_EEPROM #ifdef CFG_ENV_IS_IN_EEPROM
@ -120,7 +131,7 @@
/* Put the environment in Flash */ /* Put the environment in Flash */
#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ #define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
#define CFG_ENV_ADDR ((-CFG_MONITOR_LEN)-CFG_ENV_SECT_SIZE) #define CFG_ENV_ADDR ((-CFG_MONITOR_LEN)-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ #define CFG_ENV_SIZE 8*1024 /* 8 KB Environment Sector */
/* Address and size of Redundant Environment Sector */ /* Address and size of Redundant Environment Sector */
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE) #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
@ -158,7 +169,7 @@
/* Setup some board specific values for the default environment variables */ /* Setup some board specific values for the default environment variables */
#define CONFIG_HOSTNAME hcu4 #define CONFIG_HOSTNAME hcu4
#define CONFIG_IPADDR 172.25.1.42 #define CONFIG_IPADDR 172.25.1.99
#define CONFIG_ETHADDR 00:60:13:00:00:00 /* Netstal Machines AG MAC */ #define CONFIG_ETHADDR 00:60:13:00:00:00 /* Netstal Machines AG MAC */
#define CONFIG_OVERWRITE_ETHADDR_ONCE #define CONFIG_OVERWRITE_ETHADDR_ONCE
#define CONFIG_SERVERIP 172.25.1.3 #define CONFIG_SERVERIP 172.25.1.3
@ -180,21 +191,17 @@
"rootpath=/home/diagnose/eldk/ppc_4xx\0" \ "rootpath=/home/diagnose/eldk/ppc_4xx\0" \
"bootfile=/tftpboot/hcu4/uImage\0" \ "bootfile=/tftpboot/hcu4/uImage\0" \
"load=tftp 100000 hcu4/u-boot.bin\0" \ "load=tftp 100000 hcu4/u-boot.bin\0" \
"update=protect off FFFa0000 FFFFFFFF;era FFFa0000 FFFFFFFF;" \ "update=protect off FFFB0000 FFFFFFFF;era FFFC0000 FFFFFFFF;" \
"cp.b 100000 FFFa0000 60000\0" \ "cp.b 100000 FFFB0000 50000\0" \
"upd=run load;run update\0" \ "upd=run load;run update\0" \
"vx=tftp ${loadaddr} hcu4_vx_rom;" \ "vx=tftp ${loadaddr} hcu4_vx_rom;" \
"setenv bootargs emac(0,0)hcu4_vx_rom e=${ipaddr} " \ "vx=tftp ${loadaddr} hcu4/hcu4_vx_rom;" \
" h=${serverip} u=dpu pw=netstal8752 tn=hcu4 f=0x3008;" \ "setenv bootargs emac(0,0)c:hcu4/hcu4_vx_rom e=${ipaddr} " \
"bootvx ${loadaddr}\0" \ "bootvx ${loadaddr}\0" \
"" ""
#define CONFIG_BOOTCOMMAND "run vx" #define CONFIG_BOOTCOMMAND "run vx"
#if 0
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
#else
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#endif
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
@ -202,10 +209,10 @@
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 1 /* PHY address */ #define CONFIG_PHY_ADDR 1 /* PHY address */
#define CONFIG_PHY_RESET 1 /* reset phy upon startup */ #define CONFIG_PHY_RESET 1 /* reset phy upon startup */
#define CONFIG_HAS_ETH0 #define CONFIG_HAS_ETH0
#define CFG_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & descriptors */ #define CFG_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & desC */
/* /*
* BOOTP options * BOOTP options
@ -221,7 +228,6 @@
#include <config_cmd_default.h> #include <config_cmd_default.h>
#define CONFIG_CMD_ASKENV #define CONFIG_CMD_ASKENV
#define CONFIG_CMD_BSP
#define CONFIG_CMD_CACHE #define CONFIG_CMD_CACHE
#define CONFIG_CMD_DHCP #define CONFIG_CMD_DHCP
#define CONFIG_CMD_DIAG #define CONFIG_CMD_DIAG
@ -241,15 +247,30 @@
#define CONFIG_SPD_EEPROM 1 #define CONFIG_SPD_EEPROM 1
#define SPD_EEPROM_ADDRESS 0x50 #define SPD_EEPROM_ADDRESS 0x50
/* POST support */
#define CONFIG_POST (CFG_POST_MEMORY | \
CFG_POST_CPU | \
CFG_POST_UART | \
CFG_POST_I2C | \
CFG_POST_CACHE | \
CFG_POST_ETHER | \
CFG_POST_SPR)
#define CFG_POST_UART_TABLE {UART0_BASE}
#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4)
#undef CONFIG_LOGBUFFER
#define CFG_POST_CACHE_ADDR 0x00800000 /* free virtual address */
#define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Miscellaneous configurable options * Miscellaneous configurable options
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CFG_LONGHELP /* undef to save memory */ #define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */ #define CFG_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB) #if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else #else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#endif #endif
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */ #define CFG_MAXARGS 16 /* max number of command args */
@ -266,47 +287,40 @@
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_LOOPW 1 /* enable loopw command */ #define CONFIG_LOOPW 1 /* enable loopw command */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* External Bus Controller (EBC) Setup * External Bus Controller (EBC) Setup
*/ */
/* Memory Bank 0 (Flash Bank 0) initialization */ #define CFG_EBC_CFG 0x98400000
#define CFG_EBC_PB0AP 0x02005400
#define CFG_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */
#define CFG_EBC_PB1AP 0x03041200 /* Memory Bank 0 (Flash Bank 0) initialization */
#define CFG_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */ #define CFG_EBC_PB0AP 0x02005400
#define CFG_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */
#define CFG_EBC_PB2AP 0x02054500 #define CFG_EBC_PB1AP 0x03041200
#define CFG_EBC_PB2CR 0x78018000 /* BAS=,BS=MB,BU=R/W,BW=bit */ #define CFG_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */
#define CFG_EBC_PB3AP 0x01840300 #define CFG_EBC_PB2AP 0x02054500
#define CFG_EBC_PB3CR 0x7c0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */ #define CFG_EBC_PB2CR 0x78018000 /* BAS=,BS=MB,BU=R/W,BW=bit */
#define CFG_EBC_PB4AP 0x01800300 #define CFG_EBC_PB3AP 0x01840300
#define CFG_EBC_PB4CR 0x7e0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */ #define CFG_EBC_PB3CR 0x7c0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */
#define CFG_GPIO0_TCR 0x7ffe0000 /* GPIO value */ #define CFG_EBC_PB4AP 0x01800300
#define CFG_EBC_PB4CR 0x7e0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */
#define CFG_GPIO0_OR 0xF27FFFFF /* GPIO value */
#define CFG_GPIO0_TCR 0x7FFE0000 /* GPIO value */
#define CFG_GPIO0_ODR 0x00E897FC /* GPIO value */
/* /*
* For booting Linux, the board info and command line data * For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is * have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization. * the maximum mapped by the Linux kernel during initialization.
*/ */
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ #define CFG_BOOTMAPSZ (8 << 20)/* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
* FLASH organization
*/
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
/* Init Memory Controller: /* Init Memory Controller:
* *
@ -326,8 +340,8 @@
* *
* Boot Flags * Boot Flags
*/ */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */ #define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CFG_HUSH_PARSER /* use "hush" command parser */ #define CFG_HUSH_PARSER /* use "hush" command parser */
#ifdef CFG_HUSH_PARSER #ifdef CFG_HUSH_PARSER
@ -338,4 +352,9 @@
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif #endif
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */