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mx6: tqma6: clear enet clk sel for mba6
we have external ref clock from phy. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
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@ -114,6 +114,11 @@ static iomux_v3_cfg_t const mba6_enet_pads[] = {
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static void mba6_setup_iomuxc_enet(void)
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static void mba6_setup_iomuxc_enet(void)
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{
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{
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struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
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/* clear gpr1[ENET_CLK_SEL] for externel clock */
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clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK);
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__raw_writel(IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE,
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__raw_writel(IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE,
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(void *)IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM);
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(void *)IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM);
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__raw_writel(IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V,
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__raw_writel(IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V,
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