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arm: socfpga: spl: Toggle warm reset config I/O bit
Synchronise the SPL behavior with the original Altera code and toggle the Warm Reset Config I/O bit accordingly. Signed-off-by: Marek Vasut <marex@denx.de>
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1 changed files with 5 additions and 0 deletions
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@ -84,8 +84,13 @@ void spl_board_init(void)
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if (scan_mgr_configure_iocsr())
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hang();
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sysmgr_config_warmrstcfgio(0);
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/* configure the pin muxing through system manager */
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sysmgr_config_warmrstcfgio(1);
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sysmgr_pinmux_init();
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sysmgr_config_warmrstcfgio(0);
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#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
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/* de-assert reset for peripherals and bridges based on handoff */
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