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phy: cadence: Sierra: Check cmn_ready assertion during PHY power on

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Check if PMA cmn_ready is set indicating the startup process is complete.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
This commit is contained in:
Swapnil Jakhade 2022-01-28 13:41:45 +05:30 committed by Tom Rini
parent 990ce535eb
commit 48f29871f0
1 changed files with 35 additions and 0 deletions
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35
drivers/phy/cadence/phy-cadence-sierra.c
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@ -153,6 +153,10 @@
#define SIERRA_PHY_PIPE_CMN_CTRL1 0x0
#define SIERRA_PHY_PLL_CFG 0xe
/* PHY PMA common registers */
#define SIERRA_PHY_PMA_COMMON_OFFSET 0xe000
#define SIERRA_PHY_PMA_CMN_CTRL 0x0
#define SIERRA_MACRO_ID 0x00007364
#define SIERRA_MAX_LANES 16
#define PLL_LOCK_TIME 100
@ -173,6 +177,8 @@ static const struct reg_field macro_id_type =
REG_FIELD(SIERRA_MACRO_ID_REG, 0, 15);
static const struct reg_field phy_pll_cfg_1 =
REG_FIELD(SIERRA_PHY_PLL_CFG, 1, 1);
static const struct reg_field pma_cmn_ready =
REG_FIELD(SIERRA_PHY_PMA_CMN_CTRL, 0, 0);
static const struct reg_field pllctrl_lock =
REG_FIELD(SIERRA_PLLCTRL_STATUS_PREG, 0, 0);
@ -270,9 +276,11 @@ struct cdns_sierra_phy {
struct reset_control *phy_rst;
struct regmap *regmap_lane_cdb[SIERRA_MAX_LANES];
struct regmap *regmap_phy_pcs_common_cdb;
struct regmap *regmap_phy_pma_common_cdb;
struct regmap *regmap_common_cdb;
struct regmap_field *macro_id_type;
struct regmap_field *phy_pll_cfg_1;
struct regmap_field *pma_cmn_ready;
struct regmap_field *pllctrl_lock[SIERRA_MAX_LANES];
struct regmap_field *cmn_refrcv_refclk_plllc1en_preg[SIERRA_NUM_CMN_PLLC];
struct regmap_field *cmn_refrcv_refclk_termen_preg[SIERRA_NUM_CMN_PLLC];
@ -392,6 +400,17 @@ static int cdns_sierra_phy_on(struct phy *gphy)
return ret;
}
/*
* Wait for cmn_ready assertion
* PHY_PMA_CMN_CTRL[0] == 1
*/
ret = regmap_field_read_poll_timeout(sp->pma_cmn_ready, val, val,
1000, PLL_LOCK_TIME);
if (ret) {
dev_err(dev, "Timeout waiting for CMN ready\n");
return ret;
}
ret = regmap_field_read_poll_timeout(sp->pllctrl_lock[ins->mlane],
val, val, 1000, PLL_LOCK_TIME);
if (ret < 0)
@ -632,6 +651,14 @@ static int cdns_regfield_init(struct cdns_sierra_phy *sp)
}
sp->phy_pll_cfg_1 = field;
regmap = sp->regmap_phy_pma_common_cdb;
field = devm_regmap_field_alloc(dev, regmap, pma_cmn_ready);
if (IS_ERR(field)) {
dev_err(dev, "PHY_PMA_CMN_CTRL reg field init failed\n");
return PTR_ERR(field);
}
sp->pma_cmn_ready = field;
for (i = 0; i < SIERRA_MAX_LANES; i++) {
regmap = sp->regmap_lane_cdb[i];
field = devm_regmap_field_alloc(dev, regmap, pllctrl_lock);
@ -681,6 +708,14 @@ static int cdns_regmap_init_blocks(struct cdns_sierra_phy *sp,
}
sp->regmap_phy_pcs_common_cdb = regmap;
regmap = cdns_regmap_init(dev, base, SIERRA_PHY_PMA_COMMON_OFFSET,
block_offset_shift, reg_offset_shift);
if (IS_ERR(regmap)) {
dev_err(dev, "Failed to init PHY PMA common CDB regmap\n");
return PTR_ERR(regmap);
}
sp->regmap_phy_pma_common_cdb = regmap;
return 0;
}