serial: sh: Add support R8A7790

This adds the preset value to register, and setup of baudrate.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
This commit is contained in:
Nobuhiro Iwamatsu 2013-07-23 13:58:20 +09:00
parent 684a501e8e
commit 48ca882c9f
2 changed files with 14 additions and 0 deletions

View file

@ -1,5 +1,6 @@
/*
* SuperH SCIF device driver.
* Copyright (C) 2013 Renesas Electronics Corporation
* Copyright (C) 2007,2008,2010 Nobuhiro Iwamatsu
* Copyright (C) 2002 - 2008 Paul Mundt
*

View file

@ -224,6 +224,9 @@ struct uart_port {
# define SCSPTR3 0xffc60020 /* 16 bit SCIF */
# define SCIF_ORER 0x0001 /* Overrun error bit */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
#elif defined(CONFIG_R8A7790)
# define SCIF_ORER 0x0001
# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */
#else
# error CPU subtype not defined
#endif
@ -298,6 +301,9 @@ struct uart_port {
/* SH7763 SCIF2 support */
# define SCIF2_RFDC_MASK 0x001f
# define SCIF2_TXROOM_MAX 16
#elif defined(CONFIG_R8A7790)
# define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
# define SCIF_RFDC_MASK 0x003f
#else
# define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
# define SCIF_RFDC_MASK 0x001f
@ -579,6 +585,10 @@ SCIF_FNS(SCSPTR, 0, 0, 0, 0)
#else
SCIF_FNS(SCSPTR, 0, 0, 0x20, 16)
#endif
#if defined(CONFIG_R8A7790)
SCIF_FNS(DL, 0, 0, 0x30, 16)
SCIF_FNS(CKS, 0, 0, 0x34, 16)
#endif
SCIF_FNS(SCLSR, 0, 0, 0x24, 16)
#endif
#endif
@ -720,6 +730,9 @@ static inline int scbrr_calc(struct uart_port port, int bps, int clk)
#define SCBRR_VALUE(bps, clk) scbrr_calc(sh_sci, bps, clk)
#elif defined(__H8300H__) || defined(__H8300S__)
#define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1)
#elif defined(CONFIG_R8A7790)
#define SCBRR DL
#define SCBRR_VALUE(bps, clk) (clk / bps / 16)
#else /* Generic SH */
#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
#endif