configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2018-03-09 09:27:23 -05:00
parent 63f881d46a
commit 48ba1f3c38
13 changed files with 4 additions and 25 deletions

View file

@ -19,7 +19,6 @@ CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_JFFS2=y

View file

@ -16,7 +16,6 @@ CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y

View file

@ -15,11 +15,11 @@ CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl-mipi> "

View file

@ -15,11 +15,11 @@ CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl> "

View file

@ -33,7 +33,6 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:2m(spl),2m(uboot),1m(env),8m(kernel),1m(dtb),-(rootfs)"
CONFIG_CMD_UBI=y
CONFIG_OF_LIST="imx6q-icore imx6dl-icore"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_I2C_MXC=y
CONFIG_NAND=y

View file

@ -14,11 +14,11 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl-rqs> "

View file

@ -31,5 +31,5 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
# CONFIG_REGEX is not set
CONFIG_OF_LIBFDT=y

View file

@ -27,4 +27,3 @@ CONFIG_DEBUG_UART_PL011=y
CONFIG_DEBUG_UART_BASE=0x87e024000000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_REGEX=y

View file

@ -10,7 +10,6 @@ CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y

View file

@ -12,7 +12,6 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_ONENAND=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_JFFS2=y
CONFIG_MTDIDS_DEFAULT="onenand0=onenand"

View file

@ -42,4 +42,3 @@ CONFIG_DEBUG_UART_BASE=0xe0001000
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_REGEX=y

View file

@ -43,4 +43,3 @@ CONFIG_DEBUG_UART_BASE=0xe0001000
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_REGEX=y

View file

@ -654,9 +654,7 @@ CONFIG_FORCE_DDR_DATA_BUS_WIDTH_32
CONFIG_FORMIKE
CONFIG_FPGA_COUNT
CONFIG_FPGA_DELAY
CONFIG_FPGA_SPARTAN3
CONFIG_FPGA_STRATIX_V
CONFIG_FPGA_ZYNQPL
CONFIG_FSLDMAFEC
CONFIG_FSL_CADMUS
CONFIG_FSL_CORENET
@ -3278,9 +3276,6 @@ CONFIG_SYS_I2C_TCA642X_ADDR
CONFIG_SYS_I2C_TCA642X_BUS_NUM
CONFIG_SYS_I2C_TEGRA
CONFIG_SYS_I2C_W83782G_ADDR
CONFIG_SYS_I2C_ZYNQ
CONFIG_SYS_I2C_ZYNQ_SLAVE
CONFIG_SYS_I2C_ZYNQ_SPEED
CONFIG_SYS_IBAT
CONFIG_SYS_IBAT0L
CONFIG_SYS_IBAT0U
@ -3515,7 +3510,6 @@ CONFIG_SYS_MECR_VAL
CONFIG_SYS_MEMAC_LITTLE_ENDIAN
CONFIG_SYS_MEMORY_BASE
CONFIG_SYS_MEMORY_SIZE
CONFIG_SYS_MEMORY_TOP
CONFIG_SYS_MEMTEST_END
CONFIG_SYS_MEMTEST_SCRATCH
CONFIG_SYS_MEMTEST_START
@ -4389,7 +4383,6 @@ CONFIG_SYS_SUPPORT_64BIT_DATA
CONFIG_SYS_SXCNFG_VAL
CONFIG_SYS_TBIPA_VALUE
CONFIG_SYS_TCLK
CONFIG_SYS_TEXT_ADDR
CONFIG_SYS_TEXT_BASE_NOR
CONFIG_SYS_TEXT_BASE_SPL
CONFIG_SYS_TIMERBASE
@ -4835,7 +4828,6 @@ CONFIG_X86_MRC_ADDR
CONFIG_X86_REFCODE_ADDR
CONFIG_X86_REFCODE_RUN_ADDR
CONFIG_XGI_XG22_BASE
CONFIG_XILINX_GPIO
CONFIG_XILINX_SPI_IDLE_VAL
CONFIG_XILINX_TB_WATCHDOG
CONFIG_XR16L2751
@ -4859,12 +4851,7 @@ CONFIG_ZYNQMP_XHCI_LIST
CONFIG_ZYNQ_EEPROM
CONFIG_ZYNQ_EEPROM_BUS
CONFIG_ZYNQ_GEM_EEPROM_ADDR
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
CONFIG_ZYNQ_HISPD_BROKEN
CONFIG_ZYNQ_I2C0
CONFIG_ZYNQ_I2C1
CONFIG_ZYNQ_SDHCI0
CONFIG_ZYNQ_SDHCI1
CONFIG_ZYNQ_SDHCI_MAX_FREQ
CONFIG_ZYNQ_SDHCI_MIN_FREQ
CONFIG_eTSEC_MDIO_BUS