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mpc8xxx: Enable ECC on/off control in hwconfig
Add fsl_ddr:ecc=on in hwconfig. If ECC is enabled in board configuration file, ECC can be turned on/off by this switch. If this switch is omitted, it is ON by default. Updated hwconfig calls to use local buffer. Syntax is hwconfig=fsl_ddr:ecc=on Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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dd12768974
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47df8f03f4
2 changed files with 13 additions and 3 deletions
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@ -98,10 +98,13 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
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/* Operational Mode Paramters */
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/* Pick ECC modes */
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#ifdef CONFIG_DDR_ECC
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popts->ECC_mode = 1; /* 0 = disabled, 1 = enabled */
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#else
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popts->ECC_mode = 0; /* 0 = disabled, 1 = enabled */
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#ifdef CONFIG_DDR_ECC
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if (hwconfig_sub_f("fsl_ddr", "ecc", buf)) {
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if (hwconfig_subarg_cmp_f("fsl_ddr", "ecc", "on", buf))
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popts->ECC_mode = 1;
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} else
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popts->ECC_mode = 1;
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#endif
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popts->ECC_init_using_memctl = 1; /* 0 = use DMA, 1 = use memctl */
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@ -78,6 +78,13 @@ If the DDR controller supports address hashing, it can be enabled by hwconfig.
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Syntax is:
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hwconfig=fsl_ddr:addr_hash=true
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Memory controller ECC on/off
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============================
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If ECC is enabled in board configuratoin file, i.e. #define CONFIG_DDR_ECC,
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ECC can be turned on/off by hwconfig.
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Syntax is
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hwconfig=fsl_ddr:ecc=off
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Memory testing options for mpc85xx
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==================================
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