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rockchip: rk356x: Move common uart2 props to rk356x-u-boot.dtsi

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Move uart2 bootph-pre-ram and clock-frequency props from board to SoC
u-boot.dtsi. Regular board device tree already enables the uart2 node,
so status prop is dropped from u-boot.dtsi file.

Also remove unnecessary stdout-path = &uart2, regular board device tree
already provide a stdout-path = "serial2:" value.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jonas Karlman 2024-01-26 22:14:51 +00:00 • committed by Kever Yang
parent d7b100ab32
commit 473e54e795
14 changed files with 5 additions and 156 deletions
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7
arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
View file

@ -4,7 +4,6 @@
/ { / {
chosen { chosen {
stdout-path = &uart2;
u-boot,spl-boot-order = "same-as-spl", &sdmmc1, &sdmmc0; u-boot,spl-boot-order = "same-as-spl", &sdmmc1, &sdmmc0;
}; };
@ -88,9 +87,3 @@
vqmmc-supply = <&vcc_1v8>; vqmmc-supply = <&vcc_1v8>;
status = "okay"; status = "okay";
}; };
&uart2 {
clock-frequency = <24000000>;
bootph-all;
status = "okay";
};

12
arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
View file

@ -2,12 +2,6 @@
#include "rk356x-u-boot.dtsi" #include "rk356x-u-boot.dtsi"
/ {
chosen {
stdout-path = &uart2;
};
};
&gpio0 { &gpio0 {
bootph-all; bootph-all;
}; };
@ -28,12 +22,6 @@
}; };
}; };
&uart2 {
bootph-all;
clock-frequency = <24000000>;
status = "okay";
};
/* /*
* U-Boot does not support multiple regulators using the same gpio, * U-Boot does not support multiple regulators using the same gpio,
* use vcc5v0_usb20_host to fix use of USB 2.0 port * use vcc5v0_usb20_host to fix use of USB 2.0 port

12
arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi
View file

@ -2,12 +2,6 @@
#include "rk356x-u-boot.dtsi" #include "rk356x-u-boot.dtsi"
/ {
chosen {
stdout-path = &uart2;
};
};
&sdhci { &sdhci {
cap-mmc-highspeed; cap-mmc-highspeed;
mmc-ddr-1_8v; mmc-ddr-1_8v;
@ -24,12 +18,6 @@
}; };
}; };
&uart2 {
bootph-all;
clock-frequency = <24000000>;
status = "okay";
};
&usb_host0_xhci { &usb_host0_xhci {
dr_mode = "host"; dr_mode = "host";
}; };

12
arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
View file

@ -5,19 +5,7 @@
#include "rk356x-u-boot.dtsi" #include "rk356x-u-boot.dtsi"
/ {
chosen {
stdout-path = &uart2;
};
};
&sdhci { &sdhci {
cap-mmc-highspeed; cap-mmc-highspeed;
mmc-ddr-1_8v; mmc-ddr-1_8v;
}; };
&uart2 {
clock-frequency = <24000000>;
bootph-all;
status = "okay";
};

12
arch/arm/dts/rk3566-soquartz-u-boot.dtsi
View file

@ -2,12 +2,6 @@
#include "rk356x-u-boot.dtsi" #include "rk356x-u-boot.dtsi"
/ {
chosen {
stdout-path = &uart2;
};
};
&sdhci { &sdhci {
cap-mmc-highspeed; cap-mmc-highspeed;
mmc-ddr-1_8v; mmc-ddr-1_8v;
@ -15,12 +9,6 @@
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
}; };
&uart2 {
bootph-all;
clock-frequency = <24000000>;
status = "okay";
};
&usb_host0_xhci { &usb_host0_xhci {
dr_mode = "host"; dr_mode = "host";
}; };

13
arch/arm/dts/rk3568-bpi-r2-pro-u-boot.dtsi
View file

@ -4,16 +4,3 @@
*/ */
#include "rk356x-u-boot.dtsi" #include "rk356x-u-boot.dtsi"
/ {
chosen {
stdout-path = &uart2;
};
};
&uart2 {
clock-frequency = <24000000>;
bootph-pre-ram;
status = "okay";
};

17
arch/arm/dts/rk3568-evb-u-boot.dtsi
View file

@ -4,20 +4,3 @@
*/ */
#include "rk356x-u-boot.dtsi" #include "rk356x-u-boot.dtsi"
/ {
chosen {
stdout-path = &uart2;
u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
};
};
&sdmmc0 {
status = "okay";
};
&uart2 {
clock-frequency = <24000000>;
bootph-pre-ram;
status = "okay";
};

11
arch/arm/dts/rk3568-generic-u-boot.dtsi
View file

@ -1,14 +1,3 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT) // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk356x-u-boot.dtsi" #include "rk356x-u-boot.dtsi"
/ {
chosen {
stdout-path = &uart2;
};
};
&uart2 {
bootph-pre-ram;
clock-frequency = <24000000>;
};

12
arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi
View file

@ -6,12 +6,6 @@
#include "rk356x-u-boot.dtsi" #include "rk356x-u-boot.dtsi"
/ {
chosen {
stdout-path = &uart2;
};
};
&sdhci { &sdhci {
cap-mmc-highspeed; cap-mmc-highspeed;
mmc-ddr-1_8v; mmc-ddr-1_8v;
@ -19,9 +13,3 @@
mmc-hs400-enhanced-strobe; mmc-hs400-enhanced-strobe;
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
}; };
&uart2 {
bootph-all;
clock-frequency = <24000000>;
status = "okay";
};

12
arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
View file

@ -8,12 +8,6 @@
#include "rk356x-u-boot.dtsi" #include "rk356x-u-boot.dtsi"
/ {
chosen {
stdout-path = &uart2;
};
};
&pcie3x1 { &pcie3x1 {
/delete-property/ vpcie3v3-supply; /delete-property/ vpcie3v3-supply;
}; };
@ -27,12 +21,6 @@
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
}; };
&uart2 {
clock-frequency = <24000000>;
bootph-all;
status = "okay";
};
&vcc5v0_usb_host { &vcc5v0_usb_host {
/delete-property/ regulator-always-on; /delete-property/ regulator-always-on;
/delete-property/ regulator-boot-on; /delete-property/ regulator-boot-on;

12
arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
View file

@ -2,12 +2,6 @@
#include "rk356x-u-boot.dtsi" #include "rk356x-u-boot.dtsi"
/ {
chosen {
stdout-path = &uart2;
};
};
&fspi_dual_io_pins { &fspi_dual_io_pins {
bootph-all; bootph-all;
}; };
@ -29,9 +23,3 @@
bootph-pre-ram; bootph-pre-ram;
}; };
}; };
&uart2 {
bootph-all;
clock-frequency = <24000000>;
status = "okay";
};

12
arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
View file

@ -2,12 +2,6 @@
#include "rk356x-u-boot.dtsi" #include "rk356x-u-boot.dtsi"
/ {
chosen {
stdout-path = &uart2;
};
};
&pcie3x1 { &pcie3x1 {
pinctrl-0 = <&pcie30x1_reset_h>; pinctrl-0 = <&pcie30x1_reset_h>;
}; };
@ -28,12 +22,6 @@
mmc-hs400-enhanced-strobe; mmc-hs400-enhanced-strobe;
}; };
&uart2 {
bootph-all;
clock-frequency = <24000000>;
status = "okay";
};
&usb_host0_xhci { &usb_host0_xhci {
dr_mode = "host"; dr_mode = "host";
}; };

12
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
View file

@ -6,12 +6,6 @@
#include "rk356x-u-boot.dtsi" #include "rk356x-u-boot.dtsi"
/ {
chosen {
stdout-path = &uart2;
};
};
&pcie3x2 { &pcie3x2 {
pinctrl-0 = <&pcie3x2_reset_h>; pinctrl-0 = <&pcie3x2_reset_h>;
}; };
@ -48,9 +42,3 @@
spi-tx-bus-width = <1>; spi-tx-bus-width = <1>;
}; };
}; };
&uart2 {
clock-frequency = <24000000>;
bootph-all;
status = "okay";
};

5
arch/arm/dts/rk356x-u-boot.dtsi
View file

@ -141,6 +141,11 @@
bootph-pre-ram; bootph-pre-ram;
}; };
&uart2 {
bootph-pre-ram;
clock-frequency = <24000000>;
};
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE #ifdef CONFIG_ROCKCHIP_SPI_IMAGE
&binman { &binman {
simple-bin-spi { simple-bin-spi {