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powerpc: P1014: Drop configuration for P1014
P1014 is a variant of P1010. There is no P1014 target configured. Drop related macros. P1014 SoC is still supported. Signed-off-by: York Sun <york.sun@nxp.com>
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2f8b81268a
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46d9fc0bb7
5 changed files with 3 additions and 23 deletions
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@ -74,7 +74,6 @@ obj-$(CONFIG_ARCH_MPC8569) += mpc8569_serdes.o
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obj-$(CONFIG_ARCH_MPC8572) += mpc8572_serdes.o
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obj-$(CONFIG_ARCH_P1010) += p1010_serdes.o
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obj-$(CONFIG_ARCH_P1011) += p1021_serdes.o
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obj-$(CONFIG_P1014) += p1010_serdes.o
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obj-$(CONFIG_P1017) += p1023_serdes.o
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obj-$(CONFIG_P1020) += p1021_serdes.o
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obj-$(CONFIG_P1021) += p1021_serdes.o
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@ -707,8 +707,7 @@ int get_clocks (void)
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#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
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gd->arch.sdhc_clk = sys_info.freq_sdhc / 2;
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#else
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#if defined(CONFIG_ARCH_MPC8569) || defined(CONFIG_ARCH_P1010) ||\
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defined(CONFIG_P1014)
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#if defined(CONFIG_ARCH_MPC8569) || defined(CONFIG_ARCH_P1010)
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gd->arch.sdhc_clk = gd->bus_clk;
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#else
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gd->arch.sdhc_clk = gd->bus_clk / 2;
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@ -183,23 +183,6 @@
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#define CONFIG_SYS_FSL_ERRATUM_A004508
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#define CONFIG_SYS_FSL_ERRATUM_A005125
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#elif defined(CONFIG_P1014)
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#define CONFIG_MAX_CPUS 1
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#define CONFIG_FSL_SDHC_V2_3
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#define CONFIG_SYS_FSL_NUM_LAWS 12
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#define CONFIG_SYS_PPC_E500_DEBUG_TLB 3
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#define CONFIG_TSECV2
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#define CONFIG_SYS_FSL_SEC_COMPAT 4
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#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
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#define CONFIG_NUM_DDR_CONTROLLERS 1
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
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#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
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#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
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#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
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#define CONFIG_SYS_FSL_ERRATUM_P1010_A003549
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#define CONFIG_SYS_FSL_ERRATUM_IFC_A003399
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#define CONFIG_SYS_FSL_ERRATUM_A004508
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/* P1017 is single core version of P1023 */
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#elif defined(CONFIG_P1017)
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#define CONFIG_MAX_CPUS 1
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@ -2222,7 +2222,7 @@ typedef struct ccsr_gur {
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u32 gpindr; /* General-purpose input data */
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u8 res5[12];
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u32 pmuxcr; /* Alt. function signal multiplex control */
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#if defined(CONFIG_ARCH_P1010) || defined(CONFIG_P1014)
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#if defined(CONFIG_ARCH_P1010)
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#define MPC85xx_PMUXCR_TSEC1_0_1588 0x40000000
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#define MPC85xx_PMUXCR_TSEC1_0_RES 0xC0000000
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#define MPC85xx_PMUXCR_TSEC1_1_1588_TRIG 0x10000000
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@ -2350,7 +2350,7 @@ typedef struct ccsr_gur {
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#define MPC85xx_PMUXCR_SPI_GPIO 0x00000100
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#endif
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u32 pmuxcr2; /* Alt. function signal multiplex control 2 */
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#if defined(CONFIG_ARCH_P1010) || defined(CONFIG_P1014)
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#if defined(CONFIG_ARCH_P1010)
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#define MPC85xx_PMUXCR2_UART_GPIO 0x40000000
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#define MPC85xx_PMUXCR2_UART_TDM 0x80000000
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#define MPC85xx_PMUXCR2_UART_RES 0xC0000000
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@ -67,7 +67,6 @@ P2010RDB config_ddr3_1gb_64bit_p2020rdb_pc.dat
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P1020RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
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P1011RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
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P1010RDB config_ddr3_1gb_p1010rdb_800M.dat
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P1014RDB config_ddr3_1gb_p1014rdb_800M.dat
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P1021RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
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P1022DS config_ddr3_2gb_p1022ds.dat
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P1024RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
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