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arm: mvebu: a37xx: Move generic mbox code to arch/arm/mach-mvebu

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Generic A3720 mbox code is currently in Turris Mox specific board file
board/CZ.NIC/turris_mox/mox_sp.c. Move it to board independent arch file
arch/arm/mach-mvebu/armada3700/mbox.c.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Pali Rohár 2022-02-23 14:15:47 +01:00 committed by Stefan Roese
parent 122dae9084
commit 46ce9c78a9
4 changed files with 92 additions and 69 deletions
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2
arch/arm/mach-mvebu/armada3700/Makefile
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@ -2,5 +2,5 @@
# #
# Copyright (C) 2016 Stefan Roese <sr@denx.de> # Copyright (C) 2016 Stefan Roese <sr@denx.de>
obj-y = cpu.o obj-y = cpu.o mbox.o
obj-$(CONFIG_MVEBU_EFUSE) += efuse.o obj-$(CONFIG_MVEBU_EFUSE) += efuse.o

67
arch/arm/mach-mvebu/armada3700/mbox.c Normal file
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@ -0,0 +1,67 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Marek Behun <marek.behun@nic.cz>
*/
#include <common.h>
#include <asm/arch/soc.h>
#include <asm/io.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <mach/mbox.h>
#define RWTM_BASE (MVEBU_REGISTER(0xb0000))
#define RWTM_CMD_PARAM(i) (size_t)(RWTM_BASE + (i) * 4)
#define RWTM_CMD (RWTM_BASE + 0x40)
#define RWTM_CMD_RETSTATUS (RWTM_BASE + 0x80)
#define RWTM_CMD_STATUS(i) (size_t)(RWTM_BASE + 0x84 + (i) * 4)
#define RWTM_HOST_INT_RESET (RWTM_BASE + 0xc8)
#define RWTM_HOST_INT_MASK (RWTM_BASE + 0xcc)
#define SP_CMD_COMPLETE BIT(0)
#define MBOX_STS_SUCCESS (0x0 << 30)
#define MBOX_STS_FAIL (0x1 << 30)
#define MBOX_STS_BADCMD (0x2 << 30)
#define MBOX_STS_LATER (0x3 << 30)
#define MBOX_STS_ERROR(s) ((s) & (3 << 30))
#define MBOX_STS_VALUE(s) (((s) >> 10) & 0xfffff)
#define MBOX_STS_CMD(s) ((s) & 0x3ff)
int mbox_do_cmd(enum mbox_cmd cmd, u32 *out, int nout)
{
const int tries = 50;
int i;
u32 status;
clrbits_le32(RWTM_HOST_INT_MASK, SP_CMD_COMPLETE);
writel(cmd, RWTM_CMD);
for (i = 0; i < tries; ++i) {
mdelay(10);
if (readl(RWTM_HOST_INT_RESET) & SP_CMD_COMPLETE)
break;
}
if (i == tries) {
/* if timed out, don't read status */
setbits_le32(RWTM_HOST_INT_RESET, SP_CMD_COMPLETE);
return -ETIMEDOUT;
}
for (i = 0; i < nout; ++i)
out[i] = readl(RWTM_CMD_STATUS(i));
status = readl(RWTM_CMD_RETSTATUS);
setbits_le32(RWTM_HOST_INT_RESET, SP_CMD_COMPLETE);
if (MBOX_STS_CMD(status) != cmd)
return -EIO;
else if (MBOX_STS_ERROR(status) == MBOX_STS_FAIL)
return -(int)MBOX_STS_VALUE(status);
else if (MBOX_STS_ERROR(status) != MBOX_STS_SUCCESS)
return -EIO;
else
return MBOX_STS_VALUE(status);
}

23
arch/arm/mach-mvebu/include/mach/mbox.h Normal file
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@ -0,0 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2018 Marek Behun <marek.behun@nic.cz>
*/
#ifndef _MVEBU_MBOX_H
#define _MVEBU_MBOX_H
enum mbox_cmd {
MBOX_CMD_GET_RANDOM = 1,
MBOX_CMD_BOARD_INFO,
MBOX_CMD_ECDSA_PUB_KEY,
MBOX_CMD_HASH,
MBOX_CMD_SIGN,
MBOX_CMD_VERIFY,
MBOX_CMD_OTP_READ,
MBOX_CMD_OTP_WRITE,
};
int mbox_do_cmd(enum mbox_cmd cmd, u32 *in, int nout);
#endif

69
board/CZ.NIC/turris_mox/mox_sp.c
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@ -8,74 +8,7 @@
#include <asm/io.h> #include <asm/io.h>
#include <linux/bitops.h> #include <linux/bitops.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <mach/mbox.h>
#define RWTM_BASE (MVEBU_REGISTER(0xb0000))
#define RWTM_CMD_PARAM(i) (size_t)(RWTM_BASE + (i) * 4)
#define RWTM_CMD (RWTM_BASE + 0x40)
#define RWTM_CMD_RETSTATUS (RWTM_BASE + 0x80)
#define RWTM_CMD_STATUS(i) (size_t)(RWTM_BASE + 0x84 + (i) * 4)
#define RWTM_HOST_INT_RESET (RWTM_BASE + 0xc8)
#define RWTM_HOST_INT_MASK (RWTM_BASE + 0xcc)
#define SP_CMD_COMPLETE BIT(0)
#define MBOX_STS_SUCCESS (0x0 << 30)
#define MBOX_STS_FAIL (0x1 << 30)
#define MBOX_STS_BADCMD (0x2 << 30)
#define MBOX_STS_LATER (0x3 << 30)
#define MBOX_STS_ERROR(s) ((s) & (3 << 30))
#define MBOX_STS_VALUE(s) (((s) >> 10) & 0xfffff)
#define MBOX_STS_CMD(s) ((s) & 0x3ff)
enum mbox_cmd {
MBOX_CMD_GET_RANDOM = 1,
MBOX_CMD_BOARD_INFO,
MBOX_CMD_ECDSA_PUB_KEY,
MBOX_CMD_HASH,
MBOX_CMD_SIGN,
MBOX_CMD_VERIFY,
MBOX_CMD_OTP_READ,
MBOX_CMD_OTP_WRITE
};
static int mbox_do_cmd(enum mbox_cmd cmd, u32 *out, int nout)
{
const int tries = 50;
int i;
u32 status;
clrbits_le32(RWTM_HOST_INT_MASK, SP_CMD_COMPLETE);
writel(cmd, RWTM_CMD);
for (i = 0; i < tries; ++i) {
mdelay(10);
if (readl(RWTM_HOST_INT_RESET) & SP_CMD_COMPLETE)
break;
}
if (i == tries) {
/* if timed out, don't read status */
setbits_le32(RWTM_HOST_INT_RESET, SP_CMD_COMPLETE);
return -ETIMEDOUT;
}
for (i = 0; i < nout; ++i)
out[i] = readl(RWTM_CMD_STATUS(i));
status = readl(RWTM_CMD_RETSTATUS);
setbits_le32(RWTM_HOST_INT_RESET, SP_CMD_COMPLETE);
if (MBOX_STS_CMD(status) != cmd)
return -EIO;
else if (MBOX_STS_ERROR(status) == MBOX_STS_FAIL)
return -(int)MBOX_STS_VALUE(status);
else if (MBOX_STS_ERROR(status) != MBOX_STS_SUCCESS)
return -EIO;
else
return MBOX_STS_VALUE(status);
}
const char *mox_sp_get_ecdsa_public_key(void) const char *mox_sp_get_ecdsa_public_key(void)
{ {