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https://github.com/AsahiLinux/u-boot
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Fix PCI problems on PPChameleon board
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parent
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commit
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8 changed files with 14 additions and 7 deletions
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@ -2,6 +2,8 @@
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Changes for U-Boot 1.0.0:
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Changes for U-Boot 1.0.0:
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======================================================================
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======================================================================
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* Fix PCI problems on PPChameleon board
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* Patch by Steven Scholz, 18 Oct 2003:
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* Patch by Steven Scholz, 18 Oct 2003:
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Fix AT91RM9200 ethernet driver
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Fix AT91RM9200 ethernet driver
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@ -68,7 +68,7 @@ int board_pre_init (void)
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mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
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mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
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mtdcr(uicer, 0x00000000); /* disable all ints */
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mtdcr(uicer, 0x00000000); /* disable all ints */
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mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
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mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
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mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
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mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
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mtdcr(uictr, 0x10000000); /* set int trigger levels */
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mtdcr(uictr, 0x10000000); /* set int trigger levels */
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mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
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mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
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mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
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mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
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@ -206,11 +206,14 @@ void pci_405gp_init(struct pci_controller *hose)
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*--------------------------------------------------------------------------*/
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*--------------------------------------------------------------------------*/
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out32r(PTM1LA, ptmla[0]); /* insert address */
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out32r(PTM1LA, ptmla[0]); /* insert address */
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out32r(PTM1MS, ptmms[0]); /* insert size, enable bit is 1 */
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out32r(PTM1MS, ptmms[0]); /* insert size, enable bit is 1 */
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pci_write_config_dword(PCIDEVID_405GP, PCI_BASE_ADDRESS_1, ptmpcila[0]);
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/*--------------------------------------------------------------------------+
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/*--------------------------------------------------------------------------+
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* 405GP PCI Target configuration. (PTM2)
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* 405GP PCI Target configuration. (PTM2)
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*--------------------------------------------------------------------------*/
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*--------------------------------------------------------------------------*/
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out32r(PTM2LA, ptmla[1]); /* insert address */
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out32r(PTM2LA, ptmla[1]); /* insert address */
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pci_write_config_dword(PCIDEVID_405GP, PCI_BASE_ADDRESS_2, ptmpcila[1]);
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if (ptmms[1] == 0)
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if (ptmms[1] == 0)
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{
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{
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out32r(PTM2MS, 0x00000001); /* set enable bit */
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out32r(PTM2MS, 0x00000001); /* set enable bit */
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@ -251,7 +254,7 @@ void pci_405gp_init(struct pci_controller *hose)
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}
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}
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#if (CONFIG_PCI_HOST != PCI_HOST_ADAPTER)
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#if (CONFIG_PCI_HOST != PCI_HOST_ADAPTER)
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#if (CONFIG_PCI_HOSE == PCI_HOST_AUTO)
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#if (CONFIG_PCI_HOST == PCI_HOST_AUTO)
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if (mfdcr(strap) & PSR_PCI_ARBIT_EN)
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if (mfdcr(strap) & PSR_PCI_ARBIT_EN)
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#endif
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#endif
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{
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{
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@ -4,6 +4,10 @@ Xianghua Xiao(X.Xiao@motorola.com)
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Created 10/15/03
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Created 10/15/03
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-----------------------------------------
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-----------------------------------------
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0. Toolchain
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The Binutils in current ELDK toolchain will not support MPC85xx chip. You need
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use the newest binutils-2.14.tar.bz2 from http://ftp.gnu.org/gnu/binutils.
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1. SWITCH SETTINGS & JUMPERS
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1. SWITCH SETTINGS & JUMPERS
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1.1 First, make sure the board default setting is consistent with the document
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1.1 First, make sure the board default setting is consistent with the document
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shipped with your board. Then apply the following changes:
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shipped with your board. Then apply the following changes:
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@ -321,7 +321,7 @@ ns8382x_initialize(bd_t * bis)
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if ((devno = pci_find_devices(supported, idx++)) < 0)
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if ((devno = pci_find_devices(supported, idx++)) < 0)
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break;
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break;
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pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, &iobase);
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pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase);
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iobase &= ~0x3; /* 1: unused and 0:I/O Space Indicator */
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iobase &= ~0x3; /* 1: unused and 0:I/O Space Indicator */
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#ifdef NS8382X_DEBUG
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#ifdef NS8382X_DEBUG
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@ -428,11 +428,9 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus)
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dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
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dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
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dev += PCI_BDF(0,0,1))
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dev += PCI_BDF(0,0,1))
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{
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{
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#if ((!defined(CONFIG_405GP)) && (!defined(CONFIG_405EP))) /* don't skip host bridge on ppc405gp and 405ep */
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/* Skip our host bridge */
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/* Skip our host bridge */
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if ( dev == PCI_BDF(hose->first_busno,0,0) )
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if ( dev == PCI_BDF(hose->first_busno,0,0) )
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continue;
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continue;
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#endif
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if (PCI_FUNC(dev) && !found_multi)
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if (PCI_FUNC(dev) && !found_multi)
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continue;
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continue;
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@ -282,7 +282,7 @@
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#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
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#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
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#define CONFIG_PCI /* include pci support */
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#define CONFIG_PCI /* include pci support */
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#define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */
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#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
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#undef CONFIG_PCI_PNP /* do pci plug-and-play */
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#undef CONFIG_PCI_PNP /* do pci plug-and-play */
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/* resource configuration */
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/* resource configuration */
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@ -204,7 +204,7 @@
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"loadaddr=c400000\0" \
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"loadaddr=c400000\0" \
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"net_load=tftpboot $loadaddr $loadfile\0" \
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"net_load=tftpboot $loadaddr $loadfile\0" \
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"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
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"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
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"kernel_addr=000C0000\0" \
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"kernel_addr=00060000\0" \
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"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
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"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
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"mdm_init1=ATZ\0" \
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"mdm_init1=ATZ\0" \
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"mdm_init2=ATS0=1\0" \
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"mdm_init2=ATS0=1\0" \
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