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kirkwood: implement kw_sdram_bs_set()
Some boards might be equipped with different SDRAM configurations. When that is the case, CPU CS Window Size Register (CS[0]n Size) should be set to the biggest value through board.cfg file; then its value can be fixed at runtime according to the detected SDRAM size. Therefore, implement kw_sdram_bs_set(). Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Marek Vasut <marex@denx.de> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
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1 changed files with 24 additions and 0 deletions
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@ -39,6 +39,11 @@ struct kw_sdram_addr_dec {
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struct kw_sdram_bank sdram_bank[4];
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};
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#define KW_REG_CPUCS_WIN_ENABLE (1 << 0)
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#define KW_REG_CPUCS_WIN_WR_PROTECT (1 << 1)
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#define KW_REG_CPUCS_WIN_WIN0_CS(x) (((x) & 0x3) << 2)
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#define KW_REG_CPUCS_WIN_SIZE(x) (((x) & 0xff) << 24)
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/*
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* kw_sdram_bar - reads SDRAM Base Address Register
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*/
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@ -56,6 +61,25 @@ u32 kw_sdram_bar(enum memory_bank bank)
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return result;
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}
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/*
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* kw_sdram_bs_set - writes SDRAM Bank size
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*/
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static void kw_sdram_bs_set(enum memory_bank bank, u32 size)
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{
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struct kw_sdram_addr_dec *base =
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(struct kw_sdram_addr_dec *)KW_REGISTER(0x1500);
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/* Read current register value */
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u32 reg = readl(&base->sdram_bank[bank].win_sz);
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/* Clear window size */
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reg &= ~KW_REG_CPUCS_WIN_SIZE(0xFF);
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/* Set new window size */
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reg |= KW_REG_CPUCS_WIN_SIZE((size - 1) >> 24);
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writel(reg, &base->sdram_bank[bank].win_sz);
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}
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/*
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* kw_sdram_bs - reads SDRAM Bank size
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*/
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