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85xx: Update MPC85xx_PORDEVSR_IO_SEL mask
The MPC8572 has a 4-bit wide PORDEVSR IO_SEL field. Other MPC85xx processors have a 3-bit wide IO_SEL field but have the most significant bit is wired to 0 so this change should not affect them. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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@ -1568,7 +1568,7 @@ typedef struct ccsr_gur {
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#define MPC85xx_PORDEVSR_SGMII3_DIS 0x08000000
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#define MPC85xx_PORDEVSR_SGMII4_DIS 0x04000000
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#define MPC85xx_PORDEVSR_SRDS2_IO_SEL 0x38000000
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#define MPC85xx_PORDEVSR_IO_SEL 0x00380000
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#define MPC85xx_PORDEVSR_IO_SEL 0x00780000
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#define MPC85xx_PORDEVSR_PCI2_ARB 0x00040000
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#define MPC85xx_PORDEVSR_PCI1_ARB 0x00020000
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#define MPC85xx_PORDEVSR_PCI1_PCI32 0x00010000
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