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https://github.com/AsahiLinux/u-boot
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u-boot-imx-20220922
------------------- Fixes for 2022.10 CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13548 -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQS2TmnA27QKhpKSZe309WXkmmjvpgUCYyxtug8cc2JhYmljQGRl bnguZGUACgkQ9PVl5Jpo76b0ZwCeJRJBAddhitBJvaAW48GqRMp4EqcAnizS4UzK D4B7j2skCEWJN/GmYVV/ =o2se -----END PGP SIGNATURE----- Merge tag 'u-boot-imx-20220922' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20220922 ------------------- Fixes for 2022.10 CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13548
This commit is contained in:
Tom Rini
commit
435596d57f
9 changed files with 128 additions and 53 deletions
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@ -129,6 +129,57 @@
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phy-reset-post-delay = <1>;
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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lan1: port@0 {
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phy-handle = <&sw_phy0>;
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};
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lan2: port@1 {
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phy-handle = <&sw_phy1>;
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};
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lan3: port@2 {
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phy-handle = <&sw_phy2>;
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};
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lan4: port@3 {
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phy-handle = <&sw_phy3>;
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};
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};
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mdios {
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#address-cells = <1>;
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#size-cells = <0>;
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mdio@0 {
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reg = <0>;
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compatible = "microchip,ksz-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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sw_phy0: ethernet-phy@0 {
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reg = <0x0>;
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};
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sw_phy1: ethernet-phy@1 {
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reg = <0x1>;
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};
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sw_phy2: ethernet-phy@2 {
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reg = <0x2>;
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};
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sw_phy3: ethernet-phy@3 {
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reg = <0x3>;
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};
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};
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};
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};
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&pinctrl_fec1 {
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u-boot,dm-spl;
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};
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@ -162,6 +162,65 @@
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u-boot,dm-spl;
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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lan1: port@0 {
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phy-handle = <&sw_phy0>;
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};
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lan2: port@1 {
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phy-handle = <&sw_phy1>;
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};
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lan3: port@2 {
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phy-handle = <&sw_phy2>;
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};
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lan4: port@3 {
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phy-handle = <&sw_phy3>;
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};
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lan5: port@4 {
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phy-handle = <&sw_phy4>;
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};
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};
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mdios {
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#address-cells = <1>;
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#size-cells = <0>;
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mdio@0 {
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reg = <0>;
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compatible = "microchip,ksz-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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sw_phy0: ethernet-phy@0 {
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reg = <0x0>;
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};
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sw_phy1: ethernet-phy@1 {
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reg = <0x1>;
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};
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sw_phy2: ethernet-phy@2 {
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reg = <0x2>;
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};
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sw_phy3: ethernet-phy@3 {
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reg = <0x3>;
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};
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sw_phy4: ethernet-phy@4 {
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reg = <0x4>;
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};
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};
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};
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};
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&usdhc2 {
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>;
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assigned-clock-rates = <400000000>;
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@ -27,6 +27,7 @@
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#define IOMUXC_GPR_BASE_ADDR 0x30340000
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#define OCOTP_BASE_ADDR 0x30350000
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#define ANATOP_BASE_ADDR 0x30360000
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#define SNVS_BASE_ADDR 0x30370000
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#define CCM_BASE_ADDR 0x30380000
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#define SRC_BASE_ADDR 0x30390000
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#define GPC_BASE_ADDR 0x303A0000
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@ -113,6 +114,10 @@
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#define SRC_DDR1_RCR_CORE_RESET_N_MASK BIT(1)
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#define SRC_DDR1_RCR_PRESET_N_MASK BIT(0)
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#define SNVS_LPSR 0x4c
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#define SNVS_LPLVDR 0x64
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#define SNVS_LPPGDR_INIT 0x41736166
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struct iomuxc_gpr_base_regs {
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u32 gpr[47];
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};
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@ -544,6 +544,16 @@ static int imx8m_check_clock(void *ctx, struct event *event)
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}
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EVENT_SPY(EVT_DM_POST_INIT, imx8m_check_clock);
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static void imx8m_setup_snvs(void)
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{
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/* Enable SNVS clock */
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clock_enable(CCGR_SNVS, 1);
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/* Initialize glitch detect */
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writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR);
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/* Clear interrupt status */
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writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR);
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}
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int arch_cpu_init(void)
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{
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struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
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@ -594,6 +604,8 @@ int arch_cpu_init(void)
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writel(0x200, &ocotp->ctrl_clr);
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}
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imx8m_setup_snvs();
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return 0;
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}
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@ -34,22 +34,6 @@ int board_phys_sdram_size(phys_size_t *size)
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return 0;
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}
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/* IMX8M SNVS registers needed for the bootcount functionality */
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#define SNVS_BASE_ADDR 0x30370000
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#define SNVS_LPSR 0x4c
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#define SNVS_LPLVDR 0x64
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#define SNVS_LPPGDR_INIT 0x41736166
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static void setup_snvs(void)
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{
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/* Enable SNVS clock */
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clock_enable(CCGR_SNVS, 1);
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/* Initialize glitch detect */
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writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR);
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/* Clear interrupt status */
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writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR);
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}
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static void setup_mac_address(void)
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{
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unsigned char enetaddr[6];
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@ -99,7 +83,6 @@ static void setup_boot_device(void)
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int board_init(void)
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{
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setup_snvs();
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return 0;
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}
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@ -37,22 +37,6 @@ int board_phys_sdram_size(phys_size_t *size)
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return 0;
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}
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/* IMX8M SNVS registers needed for the bootcount functionality */
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#define SNVS_BASE_ADDR 0x30370000
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#define SNVS_LPSR 0x4c
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#define SNVS_LPLVDR 0x64
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#define SNVS_LPPGDR_INIT 0x41736166
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static void setup_snvs(void)
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{
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/* Enable SNVS clock */
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clock_enable(CCGR_SNVS, 1);
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/* Initialize glitch detect */
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writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR);
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/* Clear interrupt status */
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writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR);
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}
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static void setup_eqos(void)
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{
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struct iomuxc_gpr_base_regs *gpr =
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@ -145,7 +129,6 @@ int board_init(void)
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{
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setup_eqos();
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setup_fec();
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setup_snvs();
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return 0;
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}
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@ -12,24 +12,7 @@
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#include <asm/mach-imx/iomux-v3.h>
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#include <spl.h>
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#define SNVS_BASE_ADDR 0x30370000
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#define SNVS_LPSR 0x4c
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#define SNVS_LPLVDR 0x64
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#define SNVS_LPPGDR_INIT 0x41736166
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static void setup_snvs(void)
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{
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/* Enable SNVS clock */
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clock_enable(CCGR_SNVS, 1);
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/* Initialize glitch detect */
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writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR);
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/* Clear interrupt status */
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writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR);
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}
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void board_early_init(void)
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{
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init_uart_clk(1);
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setup_snvs();
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}
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@ -39,7 +39,6 @@ CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000
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CONFIG_SYS_SPL_MALLOC_SIZE=0x80000
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
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# CONFIG_SPL_FIT_IMAGE_TINY is not set
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CONFIG_SPL_I2C=y
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CONFIG_SPL_DM_SPI_FLASH=y
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CONFIG_SPL_POWER=y
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@ -40,7 +40,7 @@ dd if=csf_spl.bin of=flash.bin bs=1 seek=${spl_dd_offset} conv=notrunc
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# fitImage tree
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fit_block_base=$(printf "0x%x" $(( $(sed -n "/CONFIG_SYS_TEXT_BASE=/ s@.*=@@p" .config) - $(sed -n "/CONFIG_FIT_EXTERNAL_OFFSET=/ s@.*=@@p" .config) - 0x200 - 0x40)) )
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fit_block_offset=$(printf "0x%s" $(fdtget -t x u-boot.dtb /binman/imx-boot/uboot offset))
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fit_block_size=$(printf "0x%x" $(( ( $(fdtdump u-boot.itb 2>/dev/null | sed -n "/^...totalsize:/ s@.*\(0x[0-9a-f]\+\).*@\1@p") + 0x1000 - 0x1 ) & ~(0x1000 - 0x1) + 0x20 )) )
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fit_block_size=$(printf "0x%x" $(( ( ($(fdtdump u-boot.itb 2>/dev/null | sed -n "/^...totalsize:/ s@.*\(0x[0-9a-f]\+\).*@\1@p") + 0x1000 - 0x1 ) & ~(0x1000 - 0x1)) + 0x20 )) )
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sed -i "/Blocks = / s@.*@ Blocks = $fit_block_base $fit_block_offset $fit_block_size \"flash.bin\", \\\\@" csf_fit.tmp
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# U-Boot
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