cmd: remove Blackfin specific commands

These commands have no user since commit ea3310e8aa ("Blackfin:
Remove").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Masahiro Yamada 2017-04-14 10:54:59 +09:00 committed by Tom Rini
parent 60911104f3
commit 4326b45474
7 changed files with 0 additions and 734 deletions

View file

@ -23,7 +23,6 @@ obj-$(CONFIG_CMD_BLOCK_CACHE) += blkcache.o
obj-$(CONFIG_CMD_BMP) += bmp.o obj-$(CONFIG_CMD_BMP) += bmp.o
obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
obj-$(CONFIG_CMD_BOOTLDR) += bootldr.o
obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o
obj-$(CONFIG_CMD_BOOTZ) += bootz.o obj-$(CONFIG_CMD_BOOTZ) += bootz.o
obj-$(CONFIG_CMD_BOOTI) += booti.o obj-$(CONFIG_CMD_BOOTI) += booti.o
@ -32,7 +31,6 @@ obj-$(CONFIG_CMD_CBFS) += cbfs.o
obj-$(CONFIG_CMD_CLK) += clk.o obj-$(CONFIG_CMD_CLK) += clk.o
obj-$(CONFIG_CMD_CONFIG) += config.o obj-$(CONFIG_CMD_CONFIG) += config.o
obj-$(CONFIG_CMD_CONSOLE) += console.o obj-$(CONFIG_CMD_CONSOLE) += console.o
obj-$(CONFIG_CMD_CPLBINFO) += cplbinfo.o
obj-$(CONFIG_CMD_CPU) += cpu.o obj-$(CONFIG_CMD_CPU) += cpu.o
obj-$(CONFIG_DATAFLASH_MMC_SELECT) += dataflash_mmc_mux.o obj-$(CONFIG_DATAFLASH_MMC_SELECT) += dataflash_mmc_mux.o
obj-$(CONFIG_CMD_DATE) += date.o obj-$(CONFIG_CMD_DATE) += date.o
@ -77,7 +75,6 @@ obj-$(CONFIG_CMD_IRQ) += irq.o
obj-$(CONFIG_CMD_ITEST) += itest.o obj-$(CONFIG_CMD_ITEST) += itest.o
obj-$(CONFIG_CMD_JFFS2) += jffs2.o obj-$(CONFIG_CMD_JFFS2) += jffs2.o
obj-$(CONFIG_CMD_CRAMFS) += cramfs.o obj-$(CONFIG_CMD_CRAMFS) += cramfs.o
obj-$(CONFIG_CMD_LDRINFO) += ldrinfo.o
obj-$(CONFIG_LED_STATUS_CMD) += legacy_led.o obj-$(CONFIG_LED_STATUS_CMD) += legacy_led.o
obj-$(CONFIG_CMD_LED) += led.o obj-$(CONFIG_CMD_LED) += led.o
obj-$(CONFIG_CMD_LICENSE) += license.o obj-$(CONFIG_CMD_LICENSE) += license.o
@ -100,7 +97,6 @@ obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
obj-$(CONFIG_CMD_NAND) += nand.o obj-$(CONFIG_CMD_NAND) += nand.o
obj-$(CONFIG_CMD_NET) += net.o obj-$(CONFIG_CMD_NET) += net.o
obj-$(CONFIG_CMD_ONENAND) += onenand.o obj-$(CONFIG_CMD_ONENAND) += onenand.o
obj-$(CONFIG_CMD_OTP) += otp.o
obj-$(CONFIG_CMD_PART) += part.o obj-$(CONFIG_CMD_PART) += part.o
ifdef CONFIG_PCI ifdef CONFIG_PCI
obj-$(CONFIG_CMD_PCI) += pci.o obj-$(CONFIG_CMD_PCI) += pci.o
@ -119,9 +115,7 @@ obj-$(CONFIG_CMD_SF) += sf.o
obj-$(CONFIG_SCSI) += scsi.o disk.o obj-$(CONFIG_SCSI) += scsi.o disk.o
obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
obj-$(CONFIG_CMD_SETEXPR) += setexpr.o obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
obj-$(CONFIG_CMD_SOFTSWITCH) += softswitch.o
obj-$(CONFIG_CMD_SPI) += spi.o obj-$(CONFIG_CMD_SPI) += spi.o
obj-$(CONFIG_CMD_SPIBOOTLDR) += spibootldr.o
obj-$(CONFIG_CMD_STRINGS) += strings.o obj-$(CONFIG_CMD_STRINGS) += strings.o
obj-$(CONFIG_CMD_TERMINAL) += terminal.o obj-$(CONFIG_CMD_TERMINAL) += terminal.o
obj-$(CONFIG_CMD_TIME) += time.o obj-$(CONFIG_CMD_TIME) += time.o

View file

@ -1,170 +0,0 @@
/*
* U-Boot - bootldr.c
*
* Copyright (c) 2005-2008 Analog Devices Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* Licensed under the GPL-2 or later.
*/
#include <config.h>
#include <common.h>
#include <command.h>
#include <asm/blackfin.h>
#include <asm/mach-common/bits/bootrom.h>
/* Simple sanity check on the specified address to make sure it contains
* an LDR image of some sort.
*/
static bool ldr_valid_signature(uint8_t *data)
{
#if defined(__ADSPBF561__)
/* BF56x has a 4 byte global header */
if (data[3] == (GFLAG_56X_SIGN_MAGIC << (GFLAG_56X_SIGN_SHIFT - 24)))
return true;
#elif defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__) || \
defined(__ADSPBF538__) || defined(__ADSPBF539__)
/* all the BF53x should start at this address mask */
uint32_t addr;
memmove(&addr, data, sizeof(addr));
if ((addr & 0xFF0FFF0F) == 0xFF000000)
return true;
#else
/* everything newer has a magic byte */
uint32_t count;
memmove(&count, data + 8, sizeof(count));
if (data[3] == 0xAD && count == 0)
return true;
#endif
return false;
}
/* If the Blackfin is new enough, the Blackfin on-chip ROM supports loading
* LDRs from random memory addresses. So whenever possible, use that. In
* the older cases (BF53x/BF561), parse the LDR format ourselves.
*/
static void ldr_load(uint8_t *base_addr)
{
#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
/*defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__) ||*/\
defined(__ADSPBF538__) || defined(__ADSPBF539__) || defined(__ADSPBF561__)
uint32_t addr;
uint32_t count;
uint16_t flags;
/* the bf56x has a 4 byte global header ... but it is useless to
* us when booting an LDR from a memory address, so skip it
*/
# ifdef __ADSPBF561__
base_addr += 4;
# endif
memmove(&flags, base_addr + 8, sizeof(flags));
bfin_write_EVT1(flags & BFLAG_53X_RESVECT ? 0xFFA00000 : 0xFFA08000);
do {
/* block header may not be aligned */
memmove(&addr, base_addr, sizeof(addr));
memmove(&count, base_addr+4, sizeof(count));
memmove(&flags, base_addr+8, sizeof(flags));
base_addr += sizeof(addr) + sizeof(count) + sizeof(flags);
printf("loading to 0x%08x (%#x bytes) flags: 0x%04x\n",
addr, count, flags);
if (!(flags & BFLAG_53X_IGNORE)) {
if (flags & BFLAG_53X_ZEROFILL)
memset((void *)addr, 0x00, count);
else
memcpy((void *)addr, base_addr, count);
if (flags & BFLAG_53X_INIT) {
void (*init)(void) = (void *)addr;
init();
}
}
if (!(flags & BFLAG_53X_ZEROFILL))
base_addr += count;
} while (!(flags & BFLAG_53X_FINAL));
#endif
}
/* For BF537, we use the _BOOTROM_BOOT_DXE_FLASH funky ROM function.
* For all other BF53x/BF56x, we just call the entry point.
* For everything else (newer), we use _BOOTROM_MEMBOOT ROM function.
*/
static void ldr_exec(void *addr)
{
#if defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__)
/* restore EVT1 to reset value as this is what the bootrom uses as
* the default entry point when booting the final block of LDRs
*/
bfin_write_EVT1(L1_INST_SRAM);
__asm__("call (%0);" : : "a"(_BOOTROM_MEMBOOT), "q7"(addr) : "RETS", "memory");
#elif defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
defined(__ADSPBF538__) || defined(__ADSPBF539__) || defined(__ADSPBF561__)
void (*ldr_entry)(void) = (void *)bfin_read_EVT1();
ldr_entry();
#else
int32_t (*BOOTROM_MEM)(void *, int32_t, int32_t, void *) = (void *)_BOOTROM_MEMBOOT;
BOOTROM_MEM(addr, 0, 0, NULL);
#endif
}
/*
* the bootldr command loads an address, checks to see if there
* is a Boot stream that the on-chip BOOTROM can understand,
* and loads it via the BOOTROM Callback. It is possible
* to also add booting from SPI, or TWI, but this function does
* not currently support that.
*/
int do_bootldr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
void *addr;
/* Get the address */
if (argc < 2)
addr = (void *)load_addr;
else
addr = (void *)simple_strtoul(argv[1], NULL, 16);
/* Check if it is a LDR file */
if (ldr_valid_signature(addr)) {
printf("## Booting ldr image at 0x%p ...\n", addr);
ldr_load(addr);
icache_disable();
dcache_disable();
ldr_exec(addr);
} else
printf("## No ldr image at address 0x%p\n", addr);
return 0;
}
U_BOOT_CMD(
bootldr, 2, 0, do_bootldr,
"boot ldr image from memory",
"[addr]\n"
""
);

View file

@ -1,60 +0,0 @@
/*
* cmd_cplbinfo.c - dump the instruction/data cplb tables
*
* Copyright (c) 2007-2008 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <command.h>
#include <asm/blackfin.h>
#include <asm/cplb.h>
#include <asm/mach-common/bits/mpu.h>
/*
* Translate the PAGE_SIZE bits into a human string
*/
static const char *cplb_page_size(uint32_t data)
{
static const char page_size_string_table[][4] = { "1K", "4K", "1M", "4M" };
return page_size_string_table[(data & PAGE_SIZE_MASK) >> PAGE_SIZE_SHIFT];
}
/*
* show a hardware cplb table
*/
static void show_cplb_table(uint32_t *addr, uint32_t *data)
{
int i;
printf(" Address Data Size Valid Locked\n");
for (i = 1; i <= 16; ++i) {
printf(" %2i 0x%p 0x%05X %s %c %c\n",
i, (void *)*addr, *data,
cplb_page_size(*data),
(*data & CPLB_VALID ? 'Y' : 'N'),
(*data & CPLB_LOCK ? 'Y' : 'N'));
++addr;
++data;
}
}
/*
* display current instruction and data cplb tables
*/
int do_cplbinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
printf("%s CPLB table [%08x]:\n", "Instruction", *(uint32_t *)DMEM_CONTROL);
show_cplb_table((uint32_t *)ICPLB_ADDR0, (uint32_t *)ICPLB_DATA0);
printf("%s CPLB table [%08x]:\n", "Data", *(uint32_t *)IMEM_CONTROL);
show_cplb_table((uint32_t *)DCPLB_ADDR0, (uint32_t *)DCPLB_DATA0);
return 0;
}
U_BOOT_CMD(
cplbinfo, 1, 0, do_cplbinfo,
"display current CPLB tables",
""
);

View file

@ -1,192 +0,0 @@
/*
* U-Boot - ldrinfo
*
* Copyright (c) 2010 Analog Devices Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* Licensed under the GPL-2 or later.
*/
#include <config.h>
#include <common.h>
#include <command.h>
#include <asm/blackfin.h>
#include <asm/mach-common/bits/bootrom.h>
static uint32_t ldrinfo_header(const void *addr)
{
uint32_t skip = 0;
#if defined(__ADSPBF561__)
/* BF56x has a 4 byte global header */
uint32_t header, sign;
static const char * const spi_speed[] = {
"500K", "1M", "2M", "??",
};
memcpy(&header, addr, sizeof(header));
sign = (header & GFLAG_56X_SIGN_MASK) >> GFLAG_56X_SIGN_SHIFT;
printf("Header: %08X ( %s-bit-flash wait:%i hold:%i spi:%s %s)\n",
header,
(header & GFLAG_56X_16BIT_FLASH) ? "16" : "8",
(header & GFLAG_56X_WAIT_MASK) >> GFLAG_56X_WAIT_SHIFT,
(header & GFLAG_56X_HOLD_MASK) >> GFLAG_56X_HOLD_SHIFT,
spi_speed[(header & GFLAG_56X_SPI_MASK) >> GFLAG_56X_SPI_SHIFT],
sign == GFLAG_56X_SIGN_MAGIC ? "" : "!!hdrsign!! ");
skip = 4;
#endif
/* |Block @ 12345678: 12345678 12345678 12345678 12345678 | */
#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__) || \
defined(__ADSPBF538__) || defined(__ADSPBF539__) || defined(__ADSPBF561__)
printf(" Address Count Flags\n");
#else
printf(" BCode Address Count Argument\n");
#endif
return skip;
}
struct ldr_flag {
uint16_t flag;
const char *desc;
};
static uint32_t ldrinfo_block(const void *base_addr)
{
uint32_t count;
printf("Block @ %08X: ", (uint32_t)base_addr);
#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__) || \
defined(__ADSPBF538__) || defined(__ADSPBF539__) || defined(__ADSPBF561__)
uint32_t addr, pval;
uint16_t flags;
int i;
static const struct ldr_flag ldr_flags[] = {
{ BFLAG_53X_ZEROFILL, "zerofill" },
{ BFLAG_53X_RESVECT, "resvect" },
{ BFLAG_53X_INIT, "init" },
{ BFLAG_53X_IGNORE, "ignore" },
{ BFLAG_53X_COMPRESSED, "compressed"},
{ BFLAG_53X_FINAL, "final" },
};
memcpy(&addr, base_addr, sizeof(addr));
memcpy(&count, base_addr+4, sizeof(count));
memcpy(&flags, base_addr+8, sizeof(flags));
printf("%08X %08X %04X ( ", addr, count, flags);
for (i = 0; i < ARRAY_SIZE(ldr_flags); ++i)
if (flags & ldr_flags[i].flag)
printf("%s ", ldr_flags[i].desc);
pval = (flags & BFLAG_53X_PFLAG_MASK) >> BFLAG_53X_PFLAG_SHIFT;
if (pval)
printf("gpio%i ", pval);
pval = (flags & BFLAG_53X_PPORT_MASK) >> BFLAG_53X_PPORT_SHIFT;
if (pval)
printf("port%c ", 'e' + pval);
if (flags & BFLAG_53X_ZEROFILL)
count = 0;
if (flags & BFLAG_53X_FINAL)
count = 0;
else
count += sizeof(addr) + sizeof(count) + sizeof(flags);
#else
const uint8_t *raw8 = base_addr;
uint32_t bcode, addr, arg, sign, chk;
int i;
static const struct ldr_flag ldr_flags[] = {
{ BFLAG_SAFE, "safe" },
{ BFLAG_AUX, "aux" },
{ BFLAG_FILL, "fill" },
{ BFLAG_QUICKBOOT, "quickboot" },
{ BFLAG_CALLBACK, "callback" },
{ BFLAG_INIT, "init" },
{ BFLAG_IGNORE, "ignore" },
{ BFLAG_INDIRECT, "indirect" },
{ BFLAG_FIRST, "first" },
{ BFLAG_FINAL, "final" },
};
memcpy(&bcode, base_addr, sizeof(bcode));
memcpy(&addr, base_addr+4, sizeof(addr));
memcpy(&count, base_addr+8, sizeof(count));
memcpy(&arg, base_addr+12, sizeof(arg));
printf("%08X %08X %08X %08X ( ", bcode, addr, count, arg);
if (addr % 4)
printf("!!addralgn!! ");
if (count % 4)
printf("!!cntalgn!! ");
sign = (bcode & BFLAG_HDRSIGN_MASK) >> BFLAG_HDRSIGN_SHIFT;
if (sign != BFLAG_HDRSIGN_MAGIC)
printf("!!hdrsign!! ");
chk = 0;
for (i = 0; i < 16; ++i)
chk ^= raw8[i];
if (chk)
printf("!!hdrchk!! ");
printf("dma:%i ", bcode & BFLAG_DMACODE_MASK);
for (i = 0; i < ARRAY_SIZE(ldr_flags); ++i)
if (bcode & ldr_flags[i].flag)
printf("%s ", ldr_flags[i].desc);
if (bcode & BFLAG_FILL)
count = 0;
if (bcode & BFLAG_FINAL)
count = 0;
else
count += sizeof(bcode) + sizeof(addr) + sizeof(count) + sizeof(arg);
#endif
printf(")\n");
return count;
}
static int do_ldrinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
const void *addr;
uint32_t skip;
/* Get the address */
if (argc < 2)
addr = (void *)load_addr;
else
addr = (void *)simple_strtoul(argv[1], NULL, 16);
/* Walk the LDR */
addr += ldrinfo_header(addr);
do {
skip = ldrinfo_block(addr);
addr += skip;
} while (skip);
return 0;
}
U_BOOT_CMD(
ldrinfo, 2, 0, do_ldrinfo,
"validate ldr image in memory",
"[addr]\n"
);

228
cmd/otp.c
View file

@ -1,228 +0,0 @@
/*
* cmd_otp.c - interface to Blackfin on-chip One-Time-Programmable memory
*
* Copyright (c) 2007-2008 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
/* There are 512 128-bit "pages" (0x000 through 0x1FF).
* The pages are accessable as 64-bit "halfpages" (an upper and lower half).
* The pages are not part of the memory map. There is an OTP controller which
* handles scanning in/out of bits. While access is done through OTP MMRs,
* the bootrom provides C-callable helper functions to handle the interaction.
*/
#include <config.h>
#include <common.h>
#include <command.h>
#include <console.h>
#include <asm/blackfin.h>
#include <asm/clock.h>
#include <asm/mach-common/bits/otp.h>
static const char *otp_strerror(uint32_t err)
{
switch (err) {
case 0: return "no error";
case OTP_WRITE_ERROR: return "OTP fuse write error";
case OTP_READ_ERROR: return "OTP fuse read error";
case OTP_ACC_VIO_ERROR: return "invalid OTP address";
case OTP_DATA_MULT_ERROR: return "multiple bad bits detected";
case OTP_ECC_MULT_ERROR: return "error in ECC bits";
case OTP_PREV_WR_ERROR: return "space already written";
case OTP_DATA_SB_WARN: return "single bad bit in half page";
case OTP_ECC_SB_WARN: return "single bad bit in ECC";
default: return "unknown error";
}
}
#define lowup(x) ((x) % 2 ? "upper" : "lower")
static int check_voltage(void)
{
/* Make sure voltage limits are within datasheet spec */
uint16_t vr_ctl = bfin_read_VR_CTL();
#ifdef __ADSPBF54x__
/* 0.9V <= VDDINT <= 1.1V */
if ((vr_ctl & 0xc) && (vr_ctl & 0xc0) == 0xc0)
return 1;
#else
/* for the parts w/out qualification yet */
(void)vr_ctl;
#endif
return 0;
}
static void set_otp_timing(bool write)
{
static uint32_t timing;
if (!timing) {
uint32_t tp1, tp2, tp3;
/* OTP_TP1 = 1000 / sclk_period (in nanoseconds)
* OTP_TP1 = 1000 / (1 / get_sclk() * 10^9)
* OTP_TP1 = (1000 * get_sclk()) / 10^9
* OTP_TP1 = get_sclk() / 10^6
*/
tp1 = get_sclk() / 1000000;
/* OTP_TP2 = 400 / (2 * sclk_period)
* OTP_TP2 = 400 / (2 * 1 / get_sclk() * 10^9)
* OTP_TP2 = (400 * get_sclk()) / (2 * 10^9)
* OTP_TP2 = (2 * get_sclk()) / 10^7
*/
tp2 = (2 * get_sclk() / 10000000) << 8;
/* OTP_TP3 = magic constant */
tp3 = (0x1401) << 15;
timing = tp1 | tp2 | tp3;
}
bfrom_OtpCommand(OTP_INIT, write ? timing : timing & ~(-1 << 15));
}
int do_otp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *cmd;
uint32_t ret, base_flags;
bool prompt_user, force_read;
uint32_t (*otp_func)(uint32_t page, uint32_t flags, uint64_t *page_content);
if (argc < 4) {
usage:
return CMD_RET_USAGE;
}
prompt_user = false;
base_flags = 0;
cmd = argv[1];
if (!strcmp(cmd, "read"))
otp_func = bfrom_OtpRead;
else if (!strcmp(cmd, "dump")) {
otp_func = bfrom_OtpRead;
force_read = true;
} else if (!strcmp(cmd, "write")) {
otp_func = bfrom_OtpWrite;
base_flags = OTP_CHECK_FOR_PREV_WRITE;
if (!strcmp(argv[2], "--force")) {
argv++;
--argc;
} else
prompt_user = false;
} else if (!strcmp(cmd, "lock")) {
if (argc != 4)
goto usage;
otp_func = bfrom_OtpWrite;
base_flags = OTP_LOCK;
} else
goto usage;
uint64_t *addr = (uint64_t *)simple_strtoul(argv[2], NULL, 16);
uint32_t page = simple_strtoul(argv[3], NULL, 16);
uint32_t flags;
size_t i, count;
ulong half;
if (argc > 4)
count = simple_strtoul(argv[4], NULL, 16);
else
count = 2;
if (argc > 5) {
half = simple_strtoul(argv[5], NULL, 16);
if (half != 0 && half != 1) {
puts("Error: 'half' can only be '0' or '1'\n");
goto usage;
}
} else
half = 0;
/* "otp lock" has slightly different semantics */
if (base_flags & OTP_LOCK) {
count = page;
page = (uint32_t)addr;
addr = NULL;
}
/* do to the nature of OTP, make sure users are sure */
if (prompt_user) {
printf(
"Writing one time programmable memory\n"
"Make sure your operating voltages and temperature are within spec\n"
" source address: 0x%p\n"
" OTP destination: %s page 0x%03X - %s page 0x%03lX\n"
" number to write: %lu halfpages\n"
" type \"YES\" (no quotes) to confirm: ",
addr,
lowup(half), page,
lowup(half + count - 1), page + (half + count - 1) / 2,
half + count
);
if (!confirm_yesno()) {
printf(" Aborting\n");
return 1;
}
}
printf("OTP memory %s: addr 0x%p page 0x%03X count %zu ... ",
cmd, addr, page, count);
set_otp_timing(otp_func == bfrom_OtpWrite);
if (otp_func == bfrom_OtpWrite && check_voltage()) {
puts("ERROR: VDDINT voltage is out of spec for writing\n");
return -1;
}
/* Do the actual reading/writing stuff */
ret = 0;
for (i = half; i < count + half; ++i) {
flags = base_flags | (i % 2 ? OTP_UPPER_HALF : OTP_LOWER_HALF);
try_again:
ret = otp_func(page, flags, addr);
if (ret & OTP_MASTER_ERROR) {
if (force_read) {
if (flags & OTP_NO_ECC)
break;
else
flags |= OTP_NO_ECC;
puts("E");
goto try_again;
} else
break;
} else if (ret)
puts("W");
else
puts(".");
if (!(base_flags & OTP_LOCK)) {
++addr;
if (i % 2)
++page;
} else
++page;
}
if (ret & 0x1)
printf("\nERROR at page 0x%03X (%s-halfpage): 0x%03X: %s\n",
page, lowup(i), ret, otp_strerror(ret));
else
puts(" done\n");
/* Make sure we disable writing */
set_otp_timing(false);
bfrom_OtpCommand(OTP_CLOSE, 0);
return ret;
}
U_BOOT_CMD(
otp, 7, 0, do_otp,
"One-Time-Programmable sub-system",
"read <addr> <page> [count] [half]\n"
" - read 'count' half-pages starting at 'page' (offset 'half') to 'addr'\n"
"otp dump <addr> <page> [count] [half]\n"
" - like 'otp read', but skip read errors\n"
"otp write [--force] <addr> <page> [count] [half]\n"
" - write 'count' half-pages starting at 'page' (offset 'half') from 'addr'\n"
"otp lock <page> <count>\n"
" - lock 'count' pages starting at 'page'"
);

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@ -1,41 +0,0 @@
/*
* cmd_softswitch.c - set the softswitch for bf60x
*
* Copyright (c) 2012 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <command.h>
#include <asm/blackfin.h>
#include <asm/soft_switch.h>
int do_softswitch(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int switchaddr, value, pin, port;
if (argc != 5)
return CMD_RET_USAGE;
if (strcmp(argv[2], "GPA") == 0)
port = IO_PORT_A;
else if (strcmp(argv[2], "GPB") == 0)
port = IO_PORT_B;
else
return CMD_RET_USAGE;
switchaddr = simple_strtoul(argv[1], NULL, 16);
pin = simple_strtoul(argv[3], NULL, 16);
value = simple_strtoul(argv[4], NULL, 16);
config_switch_bit(switchaddr, port, (1 << pin), IO_PORT_OUTPUT, value);
return 0;
}
U_BOOT_CMD(
softswitch_output, 5, 1, do_softswitch,
"switchaddr GPA/GPB pin_offset value",
""
);

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@ -1,37 +0,0 @@
/*
* U-Boot - spibootldr.c
*
* Copyright (c) 2005-2008 Analog Devices Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <command.h>
#include <asm/blackfin.h>
#include <asm/mach-common/bits/bootrom.h>
int do_spibootldr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
s32 addr;
/* Get the address */
if (argc < 2)
addr = 0;
else
addr = simple_strtoul(argv[1], NULL, 16);
printf("## Booting ldr image at SPI offset 0x%x ...\n", addr);
return bfrom_SpiBoot(addr, BFLAG_PERIPHERAL | 4, 0, NULL);
}
U_BOOT_CMD(
spibootldr, 2, 0, do_spibootldr,
"boot ldr image from spi",
"[offset]\n"
" - boot ldr image stored at offset into spi\n");