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soc: xilinx: versal: Add soc_xilinx_versal driver
soc_xilinx_versal driver allows identification of family & revision of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL. Probe this driver using platdata U_BOOT_DEVICE structure which is defined at mach-versal/cpu.c. Add this config to xilinx_versal_virt_defconfig & xilinx_versal_mini_ospi_defconfig file to select this driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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8 changed files with 97 additions and 0 deletions
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@ -546,6 +546,7 @@ S: Maintained
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T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
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F: arch/arm/mach-versal/
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F: drivers/net/xilinx_axi_mrmac.*
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F: drivers/soc/soc_xilinx_versal.c
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F: drivers/watchdog/xilinx_wwdt.c
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N: (?<!uni)versal
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@ -1055,6 +1055,7 @@ config ARCH_VERSAL
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select DM_SERIAL
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select GPIO_EXTRA_HEADER
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select OF_CONTROL
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select SOC_DEVICE
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imply BOARD_LATE_INIT
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imply ENV_VARS_UBOOT_RUNTIME_CONFIG
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@ -13,6 +13,7 @@
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#include <asm/arch/hardware.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/cache.h>
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#include <dm/platdata.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -120,3 +121,7 @@ int arm_reserve_mmu(void)
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return 0;
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}
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#endif
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U_BOOT_DRVINFO(soc_xilinx_versal) = {
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.name = "soc_xilinx_versal",
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};
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@ -65,6 +65,10 @@ struct crp_regs {
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#define crp_base ((struct crp_regs *)VERSAL_CRP_BASEADDR)
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#define VERSAL_PS_PMC_VERSION 0xF11A0004
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#define VERSAL_PS_VER_MASK GENMASK(7, 0)
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#define VERSAL_PS_VER_SHIFT 12
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/* Bootmode setting values */
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#define BOOT_MODES_MASK 0x0000000F
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#define QSPI_MODE_24BIT 0x00000001
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@ -96,6 +96,7 @@ CONFIG_ZYNQ_GEM=y
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CONFIG_ARM_DCC=y
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CONFIG_PL01X_SERIAL=y
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CONFIG_XILINX_UARTLITE=y
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CONFIG_SOC_XILINX_VERSAL=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_ZYNQ_SPI=y
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@ -24,6 +24,14 @@ config SOC_XILINX_ZYNQMP
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This allows other drivers to verify the SoC familiy & revision
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using matching SoC attributes.
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config SOC_XILINX_VERSAL
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bool "Enable SoC Device ID driver for Xilinx Versal"
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depends on SOC_DEVICE && ARCH_VERSAL
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help
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Enable this option to select SoC device id driver for Xilinx Versal.
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This allows other drivers to verify the SoC familiy & revision using
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matching SoC attributes.
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source "drivers/soc/ti/Kconfig"
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endmenu
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@ -7,3 +7,4 @@ obj-$(CONFIG_SOC_DEVICE) += soc-uclass.o
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obj-$(CONFIG_SOC_DEVICE_TI_K3) += soc_ti_k3.o
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obj-$(CONFIG_SANDBOX) += soc_sandbox.o
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obj-$(CONFIG_SOC_XILINX_ZYNQMP) += soc_xilinx_zynqmp.o
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obj-$(CONFIG_SOC_XILINX_VERSAL) += soc_xilinx_versal.o
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76
drivers/soc/soc_xilinx_versal.c
Normal file
76
drivers/soc/soc_xilinx_versal.c
Normal file
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@ -0,0 +1,76 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Xilinx Versal SOC driver
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*
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* Copyright (C) 2021 Xilinx, Inc.
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*/
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#include <common.h>
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#include <dm.h>
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#include <soc.h>
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#include <zynqmp_firmware.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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/*
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* v1 -> 0x10 - ES1
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* v2 -> 0x20 - Production
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*/
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static const char versal_family[] = "Versal";
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struct soc_xilinx_versal_priv {
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const char *family;
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char revision;
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};
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static int soc_xilinx_versal_get_family(struct udevice *dev, char *buf, int size)
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{
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struct soc_xilinx_versal_priv *priv = dev_get_priv(dev);
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return snprintf(buf, size, "%s", priv->family);
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}
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static int soc_xilinx_versal_get_revision(struct udevice *dev, char *buf, int size)
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{
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struct soc_xilinx_versal_priv *priv = dev_get_priv(dev);
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return snprintf(buf, size, "v%d", priv->revision);
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}
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static const struct soc_ops soc_xilinx_versal_ops = {
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.get_family = soc_xilinx_versal_get_family,
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.get_revision = soc_xilinx_versal_get_revision,
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};
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static int soc_xilinx_versal_probe(struct udevice *dev)
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{
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struct soc_xilinx_versal_priv *priv = dev_get_priv(dev);
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u32 ret_payload[4];
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int ret;
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priv->family = versal_family;
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if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) {
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ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0,
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ret_payload);
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if (ret)
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return ret;
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} else {
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ret_payload[2] = readl(VERSAL_PS_PMC_VERSION);
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if (!ret_payload[2])
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return -EINVAL;
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}
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priv->revision = ret_payload[2] >> VERSAL_PS_VER_SHIFT;
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return 0;
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}
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U_BOOT_DRIVER(soc_xilinx_versal) = {
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.name = "soc_xilinx_versal",
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.id = UCLASS_SOC,
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.ops = &soc_xilinx_versal_ops,
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.probe = soc_xilinx_versal_probe,
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.priv_auto = sizeof(struct soc_xilinx_versal_priv),
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.flags = DM_FLAG_PRE_RELOC,
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};
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