riscv: Update SiFive device tree for new CLINT driver

We currently do this in a u-boot specific dts, but hopefully we can get
these bindings added in Linux in the future.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
This commit is contained in:
Sean Anderson 2020-09-28 10:52:29 -04:00 committed by Andes
parent e89e8983dc
commit 422c3c5edf
2 changed files with 10 additions and 2 deletions

View file

@ -55,9 +55,13 @@
reg = <0x0 0x10070000 0x0 0x1000>; reg = <0x0 0x10070000 0x0 0x1000>;
fuse-count = <0x1000>; fuse-count = <0x1000>;
}; };
clint@2000000 { clint: clint@2000000 {
compatible = "riscv,clint0"; compatible = "riscv,clint0";
interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7 &cpu1_intc 3 &cpu1_intc 7 &cpu2_intc 3 &cpu2_intc 7 &cpu3_intc 3 &cpu3_intc 7 &cpu4_intc 3 &cpu4_intc 7>; interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7
&cpu1_intc 3 &cpu1_intc 7
&cpu2_intc 3 &cpu2_intc 7
&cpu3_intc 3 &cpu3_intc 7
&cpu4_intc 3 &cpu4_intc 7>;
reg = <0x0 0x2000000 0x0 0xc0000>; reg = <0x0 0x2000000 0x0 0xc0000>;
u-boot,dm-spl; u-boot,dm-spl;
}; };

View file

@ -34,6 +34,10 @@
}; };
&clint {
clocks = <&rtcclk>;
};
&qspi0 { &qspi0 {
u-boot,dm-spl; u-boot,dm-spl;