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gpio/mpc83xx_spisel_boot.c: gpio driver for SPISEL_BOOT signal
Some SoCs in the mpc83xx family, e.g. mpc8309, have a dedicated spi chip select, SPISEL_BOOT, that is used by the boot code to boot from flash. This chip select will typically be used to select a SPI boot flash. The SPISEL_BOOT signal is controlled by a single bit in the SPI_CS register. Implement a gpio driver for the spi chip select register. This allows a spi driver capable of using gpios as chip select, to bind a chip select to SPISEL_BOOT. It may be a little odd to do this as a GPIO driver, since the signal is neither GP or I, but it is quite convenient to present it to the spi driver that way. The alternative it to teach mpc8xxx_spi to handle the SPISEL_BOOT signal itself (that is how it's done in the linux kernel, see commit 69b921acae8a) Signed-off-by: Klaus H. Sorensen <khso@prevas.dk> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
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4 changed files with 179 additions and 0 deletions
22
doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt
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22
doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt
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@ -0,0 +1,22 @@
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MPC83xx SPISEL_BOOT gpio controller
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Provide access to MPC83xx SPISEL_BOOT signal as a gpio to allow it to be
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easily bound as a SPI controller chip select.
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The SPISEL_BOOT signal is always an output.
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Required properties:
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- compatible: must be "fsl,mpc83xx-spisel-boot" or "fsl,mpc8309-spisel-boot".
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- reg: must point to the SPI_CS register in the SoC register map.
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- ngpios: number of gpios provided by driver, normally 1.
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Example:
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spisel_boot: spisel_boot@14c {
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compatible = "fsl,mpc8309-spisel-boot";
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reg = <0x14c 0x04>;
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#gpio-cells = <2>;
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device_type = "gpio";
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ngpios = <1>;
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};
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@ -423,6 +423,14 @@ config MPC8XXX_GPIO
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value setting, the open-drain feature, which can configure individual
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GPIOs to work as open-drain outputs, is supported.
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config MPC83XX_SPISEL_BOOT
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bool "Freescale MPC83XX SPISEL_BOOT driver"
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depends on DM_GPIO && ARCH_MPC830X
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help
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GPIO driver to set/clear dedicated SPISEL_BOOT output on MPC83XX.
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This pin is typically used as spi chip select to a spi nor flash.
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config MT7621_GPIO
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bool "MediaTek MT7621 GPIO driver"
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depends on DM_GPIO && SOC_MT7628
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@ -40,6 +40,7 @@ obj-$(CONFIG_DM644X_GPIO) += da8xx_gpio.o
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obj-$(CONFIG_ALTERA_PIO) += altera_pio.o
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obj-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
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obj-$(CONFIG_MPC8XXX_GPIO) += mpc8xxx_gpio.o
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obj-$(CONFIG_MPC83XX_SPISEL_BOOT) += mpc83xx_spisel_boot.o
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obj-$(CONFIG_SH_GPIO_PFC) += sh_pfc.o
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obj-$(CONFIG_OMAP_GPIO) += omap_gpio.o
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obj-$(CONFIG_DB8500_GPIO) += db8500_gpio.o
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148
drivers/gpio/mpc83xx_spisel_boot.c
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148
drivers/gpio/mpc83xx_spisel_boot.c
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2019 DEIF A/S
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*
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* GPIO driver to set/clear SPISEL_BOOT pin on mpc83xx.
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*/
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#include <common.h>
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#include <dm.h>
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#include <mapmem.h>
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#include <asm/gpio.h>
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struct mpc83xx_spisel_boot {
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u32 __iomem *spi_cs;
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ulong addr;
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uint gpio_count;
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ulong type;
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};
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static u32 gpio_mask(uint gpio)
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{
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return (1U << (31 - (gpio)));
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}
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static int mpc83xx_spisel_boot_direction_input(struct udevice *dev, uint gpio)
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{
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return -EINVAL;
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}
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static int mpc83xx_spisel_boot_set_value(struct udevice *dev, uint gpio, int value)
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{
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struct mpc83xx_spisel_boot *data = dev_get_priv(dev);
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debug("%s: gpio=%d, value=%u, gpio_mask=0x%08x\n", __func__,
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gpio, value, gpio_mask(gpio));
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if (value)
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setbits_be32(data->spi_cs, gpio_mask(gpio));
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else
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clrbits_be32(data->spi_cs, gpio_mask(gpio));
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return 0;
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}
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static int mpc83xx_spisel_boot_direction_output(struct udevice *dev, uint gpio, int value)
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{
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return 0;
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}
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static int mpc83xx_spisel_boot_get_value(struct udevice *dev, uint gpio)
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{
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struct mpc83xx_spisel_boot *data = dev_get_priv(dev);
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return !!(in_be32(data->spi_cs) & gpio_mask(gpio));
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}
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static int mpc83xx_spisel_boot_get_function(struct udevice *dev, uint gpio)
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{
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return GPIOF_OUTPUT;
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}
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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static int mpc83xx_spisel_boot_ofdata_to_platdata(struct udevice *dev)
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{
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struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
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fdt_addr_t addr;
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u32 reg[2];
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dev_read_u32_array(dev, "reg", reg, 2);
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addr = dev_translate_address(dev, reg);
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plat->addr = addr;
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plat->size = reg[1];
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plat->ngpios = dev_read_u32_default(dev, "ngpios", 1);
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return 0;
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}
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#endif
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static int mpc83xx_spisel_boot_platdata_to_priv(struct udevice *dev)
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{
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struct mpc83xx_spisel_boot *priv = dev_get_priv(dev);
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struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
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unsigned long size = plat->size;
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ulong driver_data = dev_get_driver_data(dev);
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if (size == 0)
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size = 0x04;
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priv->addr = plat->addr;
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priv->spi_cs = map_sysmem(plat->addr, size);
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if (!priv->spi_cs)
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return -ENOMEM;
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priv->gpio_count = plat->ngpios;
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priv->type = driver_data;
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return 0;
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}
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static int mpc83xx_spisel_boot_probe(struct udevice *dev)
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{
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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struct mpc83xx_spisel_boot *data = dev_get_priv(dev);
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char name[32], *str;
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mpc83xx_spisel_boot_platdata_to_priv(dev);
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snprintf(name, sizeof(name), "MPC@%lx_", data->addr);
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str = strdup(name);
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if (!str)
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return -ENOMEM;
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uc_priv->bank_name = str;
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uc_priv->gpio_count = data->gpio_count;
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return 0;
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}
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static const struct dm_gpio_ops mpc83xx_spisel_boot_ops = {
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.direction_input = mpc83xx_spisel_boot_direction_input,
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.direction_output = mpc83xx_spisel_boot_direction_output,
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.get_value = mpc83xx_spisel_boot_get_value,
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.set_value = mpc83xx_spisel_boot_set_value,
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.get_function = mpc83xx_spisel_boot_get_function,
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};
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static const struct udevice_id mpc83xx_spisel_boot_ids[] = {
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{ .compatible = "fsl,mpc8309-spisel-boot" },
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{ .compatible = "fsl,mpc83xx-spisel-boot" },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(spisel_boot_mpc83xx) = {
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.name = "spisel_boot_mpc83xx",
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.id = UCLASS_GPIO,
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.ops = &mpc83xx_spisel_boot_ops,
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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.ofdata_to_platdata = mpc83xx_spisel_boot_ofdata_to_platdata,
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.platdata_auto_alloc_size = sizeof(struct mpc8xxx_gpio_plat),
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.of_match = mpc83xx_spisel_boot_ids,
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#endif
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.probe = mpc83xx_spisel_boot_probe,
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.priv_auto_alloc_size = sizeof(struct mpc83xx_spisel_boot),
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};
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