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arm: imx8ulp: add trdc release request
Add TRDC release request, then we could configure resources to be accessible by A35 Domain. Signed-off-by: Peng Fan <peng.fan@nxp.com>
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parent
367ff4bc84
commit
3df564993e
1 changed files with 17 additions and 9 deletions
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@ -344,17 +344,23 @@ static void set_core0_reset_vector(u32 entry)
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setbits_le32(SIM1_BASE_ADDR + 0x8, (0x1 << 26));
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}
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static int release_xrdc(void)
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enum rdc_type {
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RDC_TRDC,
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RDC_XRDC,
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};
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static int release_rdc(enum rdc_type type)
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{
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ulong s_mu_base = 0x27020000UL;
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struct imx8ulp_s400_msg msg;
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int ret;
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u32 rdc_id = (type == RDC_XRDC) ? 0x78 : 0x74;
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msg.version = AHAB_VERSION;
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msg.tag = AHAB_CMD_TAG;
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msg.size = 2;
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msg.command = AHAB_RELEASE_RDC_REQ_CID;
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msg.data[0] = (0x78 << 8) | 0x2; /* A35 XRDC */
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msg.data[0] = (rdc_id << 8) | 0x2; /* A35 XRDC */
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mu_hal_init(s_mu_base);
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mu_hal_sendmsg(s_mu_base, 0, *((u32 *)&msg));
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@ -363,13 +369,12 @@ static int release_xrdc(void)
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ret = mu_hal_receivemsg(s_mu_base, 0, (u32 *)&msg);
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if (!ret) {
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ret = mu_hal_receivemsg(s_mu_base, 1, &msg.data[0]);
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if (!ret)
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return ret;
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if (!ret) {
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if ((msg.data[0] & 0xff) == 0xd6)
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return 0;
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}
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if ((msg.data[0] & 0xff) == 0)
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return 0;
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else
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return -EIO;
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return -EIO;
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}
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return ret;
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@ -423,8 +428,11 @@ int arch_cpu_init(void)
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/* Disable wdog */
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init_wdog();
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if (get_boot_mode() == SINGLE_BOOT)
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release_rdc(RDC_TRDC);
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/* release xrdc, then allow A35 to write SRAM2 */
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release_xrdc();
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release_rdc(RDC_XRDC);
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xrdc_mrc_region_set_access(2, CONFIG_SPL_TEXT_BASE, 0xE00);
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clock_init();
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