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usb: am437x: Add support for am437x xhci USB host
Add the support for the am437x xhci usb host. The xHCI host on AM437 is connected to a usb2 phy so need to add support to enable those clocks. Signed-off-by: Dan Murphy <dmurphy@ti.com>
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4 changed files with 48 additions and 0 deletions
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@ -51,4 +51,14 @@
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/* RTC base address */
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#define RTC_BASE 0x44E3E000
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/* USB Clock Control */
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#define PRM_PER_USB_OTG_SS0_CLKCTRL (CM_PER + 0x260)
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#define PRM_PER_USB_OTG_SS1_CLKCTRL (CM_PER + 0x268)
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#define USBOTGSSX_CLKCTRL_MODULE_EN (1 << 2)
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#define USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960 (1 << 8)
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#define PRM_PER_USBPHYOCP2SCP0_CLKCTRL (CM_PER + 0x5b8)
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#define PRM_PER_USBPHYOCP2SCP1_CLKCTRL (CM_PER + 0x5c0)
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#define USBPHYOCPSCP_MODULE_EN (1 << 2)
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#endif /* __AM43XX_HARDWARE_AM43XX_H */
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@ -207,6 +207,25 @@ void usb_phy_power(int on)
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}
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#endif /* CONFIG_OMAP_USB2PHY2_HOST */
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#ifdef CONFIG_AM437X_USB2PHY2_HOST
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static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
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{
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const u32 usb_otg_ss_clk_val = (USBOTGSSX_CLKCTRL_MODULE_EN |
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USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960);
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writel(usb_otg_ss_clk_val, PRM_PER_USB_OTG_SS0_CLKCTRL);
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writel(usb_otg_ss_clk_val, PRM_PER_USB_OTG_SS1_CLKCTRL);
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writel(USBPHYOCPSCP_MODULE_EN, PRM_PER_USBPHYOCP2SCP0_CLKCTRL);
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writel(USBPHYOCPSCP_MODULE_EN, PRM_PER_USBPHYOCP2SCP1_CLKCTRL);
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}
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void usb_phy_power(int on)
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{
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return;
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}
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#endif /* CONFIG_AM437X_USB2PHY2_HOST */
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void omap_reset_usb_phy(struct dwc3 *dwc3_reg)
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{
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/* Assert USB3 PHY reset */
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@ -231,6 +250,10 @@ void omap_enable_phy(struct omap_xhci *omap)
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omap_enable_usb2_phy2(omap);
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#endif
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#ifdef CONFIG_AM437X_USB2PHY2_HOST
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am437x_enable_usb2_phy2(omap);
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#endif
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#ifdef CONFIG_OMAP_USB3PHY1_HOST
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omap_enable_usb3_phy(omap);
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omap_usb3_phy_init(omap->usb3_phy);
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@ -24,6 +24,7 @@
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_PROMPT "U-Boot# "
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_CACHELINE_SIZE 32
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMD_BOOTZ
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@ -132,4 +133,14 @@
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/* Unsupported features */
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#undef CONFIG_USE_IRQ
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#define CONFIG_CMD_USB
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#define CONFIG_USB_HOST
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#define CONFIG_USB_XHCI
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#define CONFIG_USB_XHCI_OMAP
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#define CONFIG_USB_STORAGE
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#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
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#define CONFIG_OMAP_USB_PHY
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#define CONFIG_AM437X_USB2PHY2_HOST
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#endif /* __CONFIG_AM43XX_EVM_H */
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@ -14,6 +14,10 @@
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#define OMAP_XHCI_BASE 0x488d0000
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#define OMAP_OCP1_SCP_BASE 0x4A081000
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#define OMAP_OTG_WRAPPER_BASE 0x488c0000
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#elif defined CONFIG_AM43XX
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#define OMAP_XHCI_BASE 0x483d0000
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#define OMAP_OCP1_SCP_BASE 0x483E8000
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#define OMAP_OTG_WRAPPER_BASE 0x483dc100
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#else
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/* Default to the OMAP5 XHCI defines */
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#define OMAP_XHCI_BASE 0x4a030000
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