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arm: dts: k3-j7200-r5-common-proc-board: Set parent clock for clock ID 323

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Previously, dynamic frequency scaling supported rates only through fixed
divison.

This virtual clock mux configuration enables more varied rates on A72
clock ID 202 by setting up the required register.

Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Reid Tonking <reidt@ti.com>
This commit is contained in:
Reid Tonking 2023-12-07 10:52:11 -06:00 committed by Tom Rini
parent 9fc5e19c2e
commit 3d6cb03905
1 changed files with 2 additions and 1 deletions
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arch/arm/dts/k3-j7200-r5-common-proc-board.dts
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@ -24,7 +24,8 @@
<&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 202 0>;
clocks = <&k3_clks 61 1>;
assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>;
assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>, <&k3_clks 323 0>;
assigned-clock-parents= <0>, <0>, <&k3_clks 323 2>;
assigned-clock-rates = <2000000000>, <200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;