mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 23:47:24 +00:00
imx6: remove not longer supported aristainetos boards
Removed aristainetos2, 2b, 2b-csl. This boards have been recalled and destroyed. Adapt board code to remove stuff not needed anymore. Fix checkpatch warning, remove fdt_high and initrd_high from default environment. Signed-off-by: Heiko Schocher <hs@denx.de> zu remove
This commit is contained in:
Heiko Schocher
Stefano Babic
parent
ee1e04558f
commit
3cf02f5ffa
36 changed files with 249 additions and 2231 deletions
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@ -643,13 +643,6 @@ dtb-$(CONFIG_MX53) += imx53-cx9020.dtb \
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ifneq ($(CONFIG_MX6DL)$(CONFIG_MX6QDL)$(CONFIG_MX6S),)
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ifneq ($(CONFIG_MX6DL)$(CONFIG_MX6QDL)$(CONFIG_MX6S),)
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dtb-y += \
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dtb-y += \
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imx6dl-aristainetos2_4.dtb \
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imx6dl-aristainetos2_7.dtb \
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imx6dl-aristainetos2b_4.dtb \
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imx6dl-aristainetos2b_7.dtb \
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imx6dl-aristainetos2b_csl_4.dtb \
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imx6dl-aristainetos2b_csl_7.dtb \
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imx6dl-aristainetos2c_4.dtb \
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imx6dl-aristainetos2c_7.dtb \
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imx6dl-aristainetos2c_7.dtb \
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imx6dl-brppt2.dtb \
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imx6dl-brppt2.dtb \
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imx6dl-cubox-i.dtb \
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imx6dl-cubox-i.dtb \
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@ -1,13 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
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*/
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#include <imx6qdl-aristainetos2-u-boot.dtsi>
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&lcd_panel {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu_disp>;
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enable-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
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backlight = <&backlight>;
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};
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@ -1,51 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0)
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/*
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* support for the imx6 based aristainetos2 board
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* parts for 4.3 inch LG display on spi1 port0
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*
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* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
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* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
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*
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*/
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/dts-v1/;
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#include "imx6dl-aristainetos2_4.dtsi"
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#include "imx6qdl-aristainetos2.dtsi"
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/ {
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model = "aristainetos2 i.MX6 Dual Lite Board 4";
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compatible = "fsl,imx6dl";
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};
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&ecspi1 {
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lcd_panel: display@0 {
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compatible = "lg,lg4573";
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spi-max-frequency = <10000000>;
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reg = <0>;
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power-on-delay = <10>;
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display-timings {
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480x800p57 {
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native-mode;
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clock-frequency = <27000027>;
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hactive = <480>;
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vactive = <800>;
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hfront-porch = <10>;
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hback-porch = <59>;
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hsync-len = <10>;
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vback-porch = <15>;
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vfront-porch = <15>;
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vsync-len = <15>;
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hsync-active = <1>;
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vsync-active = <1>;
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};
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};
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port {
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panel_in: endpoint {
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remote-endpoint = <&display_out>;
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};
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};
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};
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};
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@ -1,84 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0)
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/*
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* support for the imx6 based aristainetos2 board
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* parts for 4.3 inch LG display on the parallel port and atmel maxtouch
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*
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* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
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* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
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*
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*/
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/dts-v1/;
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#include "imx6dl.dtsi"
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/ {
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display0: disp0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx-parallel-display";
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interface-pix-fmt = "rgb24";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu_disp>;
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port@0 {
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reg = <0>;
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display0_in: endpoint {
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remote-endpoint = <&ipu1_di0_disp0>;
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};
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};
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port@1 {
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reg = <1>;
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display_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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&i2c3 {
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touch: touch@4b {
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compatible = "atmel,maxtouch";
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reg = <0x4b>;
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interrupt-parent = <&gpio2>;
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interrupts = <9 8>;
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};
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};
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&ipu1_di0_disp0 {
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remote-endpoint = <&display0_in>;
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};
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&iomuxc {
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pinctrl_ipu_disp: ipudisp1grp {
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fsl,pins = <
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MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x31
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MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xE1
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MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
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MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
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MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xE1
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MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xE1
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MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xE1
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MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xE1
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MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xE1
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MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xE1
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MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xE1
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MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xE1
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MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xE1
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MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xE1
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MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xE1
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MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xE1
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MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xE1
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MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xE1
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MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xe1
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MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xE1
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MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xE1
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MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xE1
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MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0xE1
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MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0xE1
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MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0xE1
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MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0xE1
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MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0xE1
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MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0xE1
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>;
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};
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};
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@ -1,19 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
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*/
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#include <imx6qdl-aristainetos2-u-boot.dtsi>
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/ {
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vdd_panel_reg: regulator-panel {
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compatible = "regulator-fixed";
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regulator-name = "panel_regulator";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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&panel0 {
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power-supply = <&vdd_panel_reg>;
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};
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@ -1,16 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0)
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/*
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* support for the imx6 based aristainetos2 board
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*
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* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
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* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
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*
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*/
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/dts-v1/;
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#include "imx6dl-aristainetos2_7.dtsi"
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#include "imx6qdl-aristainetos2.dtsi"
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/ {
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model = "aristainetos2 i.MX6 Dual Lite Board 7";
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compatible = "fsl,imx6dl";
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};
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@ -1,7 +1,7 @@
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// SPDX-License-Identifier: (GPL-2.0)
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// SPDX-License-Identifier: (GPL-2.0)
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/*
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/*
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* support for the imx6 based aristainetos2 board
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* support for the imx6 based aristainetos2 board
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* parts for 7 inch LG display connected to the LVDS port and atmel maxtouch
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* parts for 7 inch LG display connected to the LVDS port
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*
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*
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* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
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* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
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* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
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* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
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@ -26,15 +26,6 @@
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};
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};
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};
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};
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&i2c3 {
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touch: touch@4d {
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compatible = "atmel,maxtouch";
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reg = <0x4d>;
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interrupt-parent = <&gpio2>;
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interrupts = <9 8>;
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};
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};
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&ldb {
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&ldb {
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status = "okay";
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status = "okay";
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@ -1,13 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+ or X11
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/*
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* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
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*/
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#include <imx6qdl-aristainetos2b-u-boot.dtsi>
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&lcd_panel {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu_disp>;
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enable-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
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backlight = <&backlight>;
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};
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@ -1,50 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0)
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/*
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* support for the imx6 based aristainetos2b board
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* parts for 4.3 inch LG display on spi1 port1
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*
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* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
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*
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*/
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/dts-v1/;
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#include "imx6dl-aristainetos2_4.dtsi"
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#include "imx6qdl-aristainetos2b.dtsi"
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/ {
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model = "aristainetos2b i.MX6 Dual Lite Board 4";
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compatible = "fsl,imx6dl";
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};
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&ecspi1 {
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lcd_panel: display@0 {
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compatible = "lg,lg4573";
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spi-max-frequency = <10000000>;
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reg = <1>;
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power-on-delay = <10>;
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display-timings {
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480x800p57 {
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native-mode;
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clock-frequency = <27000027>;
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hactive = <480>;
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vactive = <800>;
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hfront-porch = <10>;
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hback-porch = <59>;
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hsync-len = <10>;
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vback-porch = <15>;
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vfront-porch = <15>;
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vsync-len = <15>;
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hsync-active = <1>;
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vsync-active = <1>;
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};
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};
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port {
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panel_in: endpoint {
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remote-endpoint = <&display_out>;
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};
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};
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};
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};
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// SPDX-License-Identifier: GPL-2.0+ or X11
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/*
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* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
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*/
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#include <imx6qdl-aristainetos2b-u-boot.dtsi>
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/ {
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vdd_panel_reg: regulator-panel {
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compatible = "regulator-fixed";
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regulator-name = "panel_regulator";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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&panel0 {
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power-supply = <&vdd_panel_reg>;
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};
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@ -1,16 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0)
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/*
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* support for the imx6 based aristainetos2 board
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*
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* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
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* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
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*
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*/
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/dts-v1/;
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#include "imx6dl-aristainetos2_7.dtsi"
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#include "imx6qdl-aristainetos2b.dtsi"
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/ {
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model = "aristainetos2b i.MX6 Dual Lite Board 7";
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compatible = "fsl,imx6dl";
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};
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@ -1,13 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+ or X11
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/*
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* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
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*/
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#include <imx6qdl-aristainetos2b_csl-u-boot.dtsi>
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&lcd_panel {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu_disp>;
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enable-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
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backlight = <&backlight>;
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};
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@ -1,50 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0)
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/*
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* support for the imx6 based aristainetos2b csl board
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|
||||||
* parts for 4.3 inch LG display on spi1 port1
|
|
||||||
*
|
|
||||||
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
/dts-v1/;
|
|
||||||
|
|
||||||
#include "imx6dl-aristainetos2_4.dtsi"
|
|
||||||
#include "imx6qdl-aristainetos2b_csl.dtsi"
|
|
||||||
|
|
||||||
/ {
|
|
||||||
model = "aristainetos2b csl i.MX6 Dual Lite Board 4";
|
|
||||||
compatible = "fsl,imx6dl";
|
|
||||||
|
|
||||||
};
|
|
||||||
|
|
||||||
&ecspi1 {
|
|
||||||
lcd_panel: display@0 {
|
|
||||||
compatible = "lg,lg4573";
|
|
||||||
spi-max-frequency = <10000000>;
|
|
||||||
reg = <1>;
|
|
||||||
power-on-delay = <10>;
|
|
||||||
|
|
||||||
display-timings {
|
|
||||||
480x800p57 {
|
|
||||||
native-mode;
|
|
||||||
clock-frequency = <27000027>;
|
|
||||||
hactive = <480>;
|
|
||||||
vactive = <800>;
|
|
||||||
hfront-porch = <10>;
|
|
||||||
hback-porch = <59>;
|
|
||||||
hsync-len = <10>;
|
|
||||||
vback-porch = <15>;
|
|
||||||
vfront-porch = <15>;
|
|
||||||
vsync-len = <15>;
|
|
||||||
hsync-active = <1>;
|
|
||||||
vsync-active = <1>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
port {
|
|
||||||
panel_in: endpoint {
|
|
||||||
remote-endpoint = <&display_out>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
@ -1,19 +0,0 @@
|
||||||
// SPDX-License-Identifier: GPL-2.0+ or X11
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <imx6qdl-aristainetos2b_csl-u-boot.dtsi>
|
|
||||||
/ {
|
|
||||||
vdd_panel_reg: regulator-panel {
|
|
||||||
compatible = "regulator-fixed";
|
|
||||||
regulator-name = "panel_regulator";
|
|
||||||
regulator-min-microvolt = <3300000>;
|
|
||||||
regulator-max-microvolt = <3300000>;
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&panel0 {
|
|
||||||
power-supply = <&vdd_panel_reg>;
|
|
||||||
};
|
|
||||||
|
|
@ -1,16 +0,0 @@
|
||||||
// SPDX-License-Identifier: (GPL-2.0)
|
|
||||||
/*
|
|
||||||
* support for the imx6 based aristainetos2 board
|
|
||||||
*
|
|
||||||
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
|
||||||
* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
/dts-v1/;
|
|
||||||
#include "imx6dl-aristainetos2_7.dtsi"
|
|
||||||
#include "imx6qdl-aristainetos2b_csl.dtsi"
|
|
||||||
|
|
||||||
/ {
|
|
||||||
model = "aristainetos2b csl i.MX6 Dual Lite Board 7";
|
|
||||||
compatible = "fsl,imx6dl";
|
|
||||||
};
|
|
||||||
|
|
@ -1,13 +0,0 @@
|
||||||
// SPDX-License-Identifier: GPL-2.0+ or X11
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <imx6qdl-aristainetos2c-u-boot.dtsi>
|
|
||||||
|
|
||||||
&lcd_panel {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_ipu_disp>;
|
|
||||||
enable-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
|
|
||||||
backlight = <&backlight>;
|
|
||||||
};
|
|
||||||
|
|
@ -1,50 +0,0 @@
|
||||||
// SPDX-License-Identifier: (GPL-2.0)
|
|
||||||
/*
|
|
||||||
* support for the imx6 based aristainetos2c board
|
|
||||||
* parts for 4.3 inch LG display on spi1 port1
|
|
||||||
*
|
|
||||||
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
/dts-v1/;
|
|
||||||
|
|
||||||
#include "imx6dl-aristainetos2_4.dtsi"
|
|
||||||
#include "imx6qdl-aristainetos2c.dtsi"
|
|
||||||
|
|
||||||
/ {
|
|
||||||
model = "aristainetos2c i.MX6 Dual Lite Board 4";
|
|
||||||
compatible = "fsl,imx6dl";
|
|
||||||
|
|
||||||
};
|
|
||||||
|
|
||||||
&ecspi1 {
|
|
||||||
lcd_panel: display@0 {
|
|
||||||
compatible = "lg,lg4573";
|
|
||||||
spi-max-frequency = <10000000>;
|
|
||||||
reg = <1>;
|
|
||||||
power-on-delay = <10>;
|
|
||||||
|
|
||||||
display-timings {
|
|
||||||
480x800p57 {
|
|
||||||
native-mode;
|
|
||||||
clock-frequency = <27000027>;
|
|
||||||
hactive = <480>;
|
|
||||||
vactive = <800>;
|
|
||||||
hfront-porch = <10>;
|
|
||||||
hback-porch = <59>;
|
|
||||||
hsync-len = <10>;
|
|
||||||
vback-porch = <15>;
|
|
||||||
vfront-porch = <15>;
|
|
||||||
vsync-len = <15>;
|
|
||||||
hsync-active = <1>;
|
|
||||||
vsync-active = <1>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
port {
|
|
||||||
panel_in: endpoint {
|
|
||||||
remote-endpoint = <&display_out>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
@ -11,6 +11,6 @@
|
||||||
#include "imx6qdl-aristainetos2c.dtsi"
|
#include "imx6qdl-aristainetos2c.dtsi"
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "aristainetos2c i.MX6 Dual Lite Board 7";
|
model = "aristainetos2c+2d i.MX6 Dual Lite Boards 7";
|
||||||
compatible = "fsl,imx6dl";
|
compatible = "fsl,imx6dl";
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
// SPDX-License-Identifier: (GPL-2.0)
|
// SPDX-License-Identifier: (GPL-2.0)
|
||||||
/*
|
/*
|
||||||
* support for the imx6 based aristainetos2 board
|
* support for the imx6 based aristainetos2 boards
|
||||||
* parts common to all versions
|
* parts common to all versions
|
||||||
*
|
*
|
||||||
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
||||||
|
|
@ -13,6 +13,8 @@
|
||||||
/ {
|
/ {
|
||||||
aliases {
|
aliases {
|
||||||
eeprom0 = &i2c_eeprom0;
|
eeprom0 = &i2c_eeprom0;
|
||||||
|
eeprom1 = &i2c_eeprom1;
|
||||||
|
eeprom2 = &i2c_eeprom2;
|
||||||
pmic0 = &i2c_pmic0;
|
pmic0 = &i2c_pmic0;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -250,6 +252,12 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
i2c_eeprom2: eeprom@57{
|
||||||
|
compatible = "atmel,24c64";
|
||||||
|
reg = <0x57>;
|
||||||
|
pagesize = <32>;
|
||||||
|
};
|
||||||
|
|
||||||
rtc@68 {
|
rtc@68 {
|
||||||
compatible = "st,m41t11";
|
compatible = "st,m41t11";
|
||||||
reg = <0x68>;
|
reg = <0x68>;
|
||||||
|
|
@ -274,6 +282,19 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&gpio2 {
|
||||||
|
tpm_pp {
|
||||||
|
gpio-hog;
|
||||||
|
output-low;
|
||||||
|
gpios = <17 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
tpm_reset {
|
||||||
|
gpio-hog;
|
||||||
|
output-high;
|
||||||
|
gpios = <18 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
&gpio6 {
|
&gpio6 {
|
||||||
spi_bus_ena {
|
spi_bus_ena {
|
||||||
gpio-hog;
|
gpio-hog;
|
||||||
|
|
|
||||||
|
|
@ -50,28 +50,6 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&iomuxc {
|
|
||||||
pinctrl-0 = <&pinctrl_gpio &pinctrl_gpio_fix>;
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
|
|
||||||
pinctrl_gpio_fix: gpiofixgrp {
|
|
||||||
/*
|
|
||||||
* usdhc2 has a levelshifter on the carrier board Rev. DV1,
|
|
||||||
* that will automatically detect the driving direction.
|
|
||||||
* During initialisation this isn't working correctly,
|
|
||||||
* which causes DAT3 to be driven low towards the SD-card.
|
|
||||||
* This causes a SD-card enetring the SPI-Mode
|
|
||||||
* and therefore getting inaccessible until next power cycle.
|
|
||||||
* As workaround we drive the DAT3 line as GPIO and set it high.
|
|
||||||
* This makes usdhc2 unusable in u-boot, but works for the
|
|
||||||
* initialisation in Linux
|
|
||||||
*/
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x20000
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&gpio1 {
|
&gpio1 {
|
||||||
usdhc_fix {
|
usdhc_fix {
|
||||||
gpio-hog;
|
gpio-hog;
|
||||||
|
|
|
||||||
|
|
@ -1,244 +0,0 @@
|
||||||
// SPDX-License-Identifier: (GPL-2.0)
|
|
||||||
/*
|
|
||||||
* support for the imx6 based aristainetos2 board
|
|
||||||
*
|
|
||||||
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
|
||||||
* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
|
||||||
#include <dt-bindings/clock/imx6qdl-clock.h>
|
|
||||||
|
|
||||||
#include "imx6qdl-aristainetos2-common.dtsi"
|
|
||||||
|
|
||||||
/ {
|
|
||||||
leds {
|
|
||||||
compatible = "gpio-leds";
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_gpio>;
|
|
||||||
|
|
||||||
LED_blue {
|
|
||||||
label = "led_blue";
|
|
||||||
gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_green {
|
|
||||||
label = "led_green";
|
|
||||||
gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_red {
|
|
||||||
label = "led_red";
|
|
||||||
gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_yellow {
|
|
||||||
label = "led_yellow";
|
|
||||||
gpios = <&gpio6 16 GPIO_ACTIVE_LOW>;
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_ena {
|
|
||||||
label = "led_ena";
|
|
||||||
gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&ecspi1 {
|
|
||||||
fsl,spi-num-chipselects = <3>;
|
|
||||||
cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH
|
|
||||||
&gpio4 10 GPIO_ACTIVE_HIGH
|
|
||||||
&gpio4 11 GPIO_ACTIVE_HIGH>;
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_ecspi1>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&ecspi4 {
|
|
||||||
fsl,spi-num-chipselects = <2>;
|
|
||||||
cs-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH &gpio5 2 GPIO_ACTIVE_HIGH>;
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_ecspi4>;
|
|
||||||
status = "okay";
|
|
||||||
pinctrl-assert-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
|
|
||||||
|
|
||||||
flash: m25p80@1 {
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
compatible = "micron,n25q128a11", "jedec,spi-nor";
|
|
||||||
spi-max-frequency = <20000000>;
|
|
||||||
reg = <1>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&gpio7 {
|
|
||||||
sd2_driver_ena {
|
|
||||||
gpio-hog;
|
|
||||||
output-high;
|
|
||||||
gpios = <8 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&gpmi {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&can1 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_flexcan1>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&can2 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_flexcan2>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&usdhc1 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
|
||||||
cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
|
|
||||||
no-1-8-v;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&usdhc2 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
|
||||||
cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
|
|
||||||
wp-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
|
|
||||||
no-1-8-v;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&iomuxc {
|
|
||||||
pinctrl_ecspi1: ecspi1grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
|
|
||||||
MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x100b1 /* SS0# */
|
|
||||||
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x100b1 /* SS1# */
|
|
||||||
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x100b1 /* SS2# */
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_ecspi4: ecspi4grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x100b1 /* SS0# */
|
|
||||||
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 /* SS1# */
|
|
||||||
MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x4001b0b0 /* WP pin */
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_gpio: gpiogrp {
|
|
||||||
fsl,pins = <
|
|
||||||
/* led enable */
|
|
||||||
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x4001b0b0
|
|
||||||
/* LCD power enable */
|
|
||||||
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x4001b0b0
|
|
||||||
/* led yellow */
|
|
||||||
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x4001b0b0
|
|
||||||
/* led red */
|
|
||||||
MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x4001b0b0
|
|
||||||
/* led green */
|
|
||||||
MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x4001b0b0
|
|
||||||
/* led blue */
|
|
||||||
MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x4001b0b0
|
|
||||||
/* Profibus IRQ */
|
|
||||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
|
|
||||||
/* FPGA IRQ currently unused*/
|
|
||||||
MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0
|
|
||||||
/* Display reset because of clock failure */
|
|
||||||
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b0
|
|
||||||
/* spi bus #2 SS driver enable */
|
|
||||||
MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x4001b0b0
|
|
||||||
/* RST_LOC# PHY reset input (has pull-down!)*/
|
|
||||||
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x4001b0b0
|
|
||||||
/* USB_OTG_ID = GPIO1_24*/
|
|
||||||
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x4001b0b0
|
|
||||||
/* Touchscreen IRQ */
|
|
||||||
MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
|
|
||||||
/* PCIe reset */
|
|
||||||
MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x4001b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_gpmi_nand: gpmi-nand {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
|
||||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
|
||||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
|
||||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_flexcan1: flexcan1grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x1b0b0
|
|
||||||
MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x1b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_flexcan2: flexcan2grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0
|
|
||||||
MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_usbotg: usbotggrp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_usdhc1: usdhc1grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
|
|
||||||
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
|
|
||||||
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
|
|
||||||
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
|
|
||||||
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
|
|
||||||
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
|
|
||||||
/* SD1 card detect input */
|
|
||||||
MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0
|
|
||||||
/* SD1 write protect input */
|
|
||||||
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_usdhc2: usdhc2grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x71
|
|
||||||
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x71
|
|
||||||
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x71
|
|
||||||
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x71
|
|
||||||
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x71
|
|
||||||
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x71
|
|
||||||
/* SD2 level shifter output enable */
|
|
||||||
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x4001b0b0
|
|
||||||
/* SD2 card detect input */
|
|
||||||
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
|
|
||||||
/* SD2 write protect input */
|
|
||||||
MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
@ -1,77 +0,0 @@
|
||||||
// SPDX-License-Identifier: GPL-2.0+ or X11
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
|
||||||
*/
|
|
||||||
|
|
||||||
/ {
|
|
||||||
chosen {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
stdout-path = &uart2;
|
|
||||||
};
|
|
||||||
|
|
||||||
wdt-reboot {
|
|
||||||
compatible = "wdt-reboot";
|
|
||||||
wdt = <&wdog1>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&uart2 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&pinctrl_gpio {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&pinctrl_uart2 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&iomuxc {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&aips2 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&backlight {
|
|
||||||
pwms = <&pwm1 0 300000>;
|
|
||||||
default-brightness-level = <2>;
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
|
||||||
* allow switching write protect / reset pin by gpio,
|
|
||||||
* because "pinctrl-assert-gpios" from &ecspi1 isn't handled by u-boot
|
|
||||||
*/
|
|
||||||
&gpio2 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
|
|
||||||
wp_spi_nor {
|
|
||||||
gpio-hog;
|
|
||||||
output-high;
|
|
||||||
gpios = <15 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
|
|
||||||
reset_spi_nor {
|
|
||||||
gpio-hog;
|
|
||||||
output-high;
|
|
||||||
gpios = <28 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&gpio4 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&ecspi1 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&flash {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&pinctrl_ecspi1 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
@ -1,266 +0,0 @@
|
||||||
// SPDX-License-Identifier: (GPL-2.0)
|
|
||||||
/*
|
|
||||||
* support for the imx6 based aristainetos2b board
|
|
||||||
*
|
|
||||||
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
|
||||||
* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
|
||||||
#include <dt-bindings/clock/imx6qdl-clock.h>
|
|
||||||
|
|
||||||
#include "imx6qdl-aristainetos2-common.dtsi"
|
|
||||||
|
|
||||||
/ {
|
|
||||||
leds {
|
|
||||||
compatible = "gpio-leds";
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_gpio>;
|
|
||||||
|
|
||||||
LED_blue {
|
|
||||||
label = "led_blue";
|
|
||||||
gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_green {
|
|
||||||
label = "led_green";
|
|
||||||
gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_red {
|
|
||||||
label = "led_red";
|
|
||||||
gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_yellow {
|
|
||||||
label = "led_yellow";
|
|
||||||
gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_ena {
|
|
||||||
label = "led_ena";
|
|
||||||
gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&ecspi1 {
|
|
||||||
fsl,spi-num-chipselects = <3>;
|
|
||||||
cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH
|
|
||||||
&gpio4 10 GPIO_ACTIVE_HIGH
|
|
||||||
&gpio4 11 GPIO_ACTIVE_HIGH>;
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_ecspi1>;
|
|
||||||
status = "okay";
|
|
||||||
pinctrl-assert-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
|
|
||||||
pinctrl-assert-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
|
|
||||||
|
|
||||||
flash: m25p80@0 {
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
compatible = "micron,n25q128a11", "jedec,spi-nor";
|
|
||||||
spi-max-frequency = <20000000>;
|
|
||||||
reg = <0>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&ecspi4 {
|
|
||||||
fsl,spi-num-chipselects = <2>;
|
|
||||||
cs-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH &gpio5 2 GPIO_ACTIVE_HIGH>;
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_ecspi4>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&i2c1 {
|
|
||||||
tpm@20 {
|
|
||||||
compatible = "infineon,slb9645tt";
|
|
||||||
reg = <0x20>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&gpio7 {
|
|
||||||
sd2_driver_ena {
|
|
||||||
gpio-hog;
|
|
||||||
output-high;
|
|
||||||
gpios = <8 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&gpmi {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&can1 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_flexcan1>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&can2 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_flexcan2>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&usdhc1 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
|
||||||
cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
|
|
||||||
wp-gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>;
|
|
||||||
no-1-8-v;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&usdhc2 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
|
||||||
/*
|
|
||||||
* comment out this line to make the WiFi Eval-Module work in
|
|
||||||
* SD-Slot2, and add line:
|
|
||||||
* broken-cd;
|
|
||||||
* causes 6% CPU load if no WiFi module installed (polling)
|
|
||||||
*/
|
|
||||||
cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
|
|
||||||
wp-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
|
|
||||||
no-1-8-v;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&iomuxc {
|
|
||||||
pinctrl_ecspi1: ecspi1grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
|
|
||||||
/* SS0# */
|
|
||||||
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
|
|
||||||
/* SS1# */
|
|
||||||
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x100b1
|
|
||||||
/* SS2# */
|
|
||||||
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x100b1
|
|
||||||
/* WP pin NOR Flash */
|
|
||||||
MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x4001b0b0
|
|
||||||
/* Flash nReset */
|
|
||||||
MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x4001b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_ecspi4: ecspi4grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x100b1 /* SS0# */
|
|
||||||
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 /* SS1# */
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_gpio: gpiogrp {
|
|
||||||
fsl,pins = <
|
|
||||||
/* led enable */
|
|
||||||
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x4001b0b0
|
|
||||||
/* LCD power enable */
|
|
||||||
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x4001b0b0
|
|
||||||
/* led yellow */
|
|
||||||
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x4001b0b0
|
|
||||||
/* led red */
|
|
||||||
MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x4001b0b0
|
|
||||||
/* led green */
|
|
||||||
MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x4001b0b0
|
|
||||||
/* led blue */
|
|
||||||
MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x4001b0b0
|
|
||||||
/* Profibus IRQ */
|
|
||||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
|
|
||||||
/* FPGA IRQ currently unused*/
|
|
||||||
MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0
|
|
||||||
/* Display reset because of clock failure */
|
|
||||||
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b0
|
|
||||||
/* spi bus #2 SS driver enable */
|
|
||||||
MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x4001b0b0
|
|
||||||
/* RST_LOC# PHY reset input (has pull-down!)*/
|
|
||||||
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x4001b0b0
|
|
||||||
/* Touchscreen IRQ */
|
|
||||||
MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
|
|
||||||
/* PCIe reset */
|
|
||||||
MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x4001b0b0
|
|
||||||
/* make sure pin is GPIO and not ENET_REF_CLK */
|
|
||||||
MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x4001a0b0
|
|
||||||
/* SD2 level shifter output enable / SD2 Reset# */
|
|
||||||
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x4001b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_gpmi_nand: gpmi-nand {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
|
||||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
|
||||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
|
||||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_flexcan1: flexcan1grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x1b0b0
|
|
||||||
MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x1b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_flexcan2: flexcan2grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0
|
|
||||||
MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_usbotg: usbotggrp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
|
|
||||||
MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_usdhc1: usdhc1grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
|
|
||||||
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
|
|
||||||
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
|
|
||||||
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
|
|
||||||
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
|
|
||||||
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
|
|
||||||
/* SD1 card detect input */
|
|
||||||
MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0
|
|
||||||
/* SD1 write protect input */
|
|
||||||
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_usdhc2: usdhc2grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x71
|
|
||||||
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x71
|
|
||||||
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x71
|
|
||||||
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x71
|
|
||||||
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x71
|
|
||||||
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x71
|
|
||||||
/* SD2 card detect input */
|
|
||||||
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
|
|
||||||
/* SD2 write protect input */
|
|
||||||
MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
@ -1,77 +0,0 @@
|
||||||
// SPDX-License-Identifier: GPL-2.0+ or X11
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
|
||||||
*/
|
|
||||||
|
|
||||||
/ {
|
|
||||||
chosen {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
stdout-path = &uart1;
|
|
||||||
};
|
|
||||||
|
|
||||||
wdt-reboot {
|
|
||||||
compatible = "wdt-reboot";
|
|
||||||
wdt = <&wdog1>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&uart1 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&pinctrl_gpio {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&pinctrl_uart1 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&iomuxc {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&aips1 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&backlight {
|
|
||||||
pwms = <&pwm1 0 300000>;
|
|
||||||
default-brightness-level = <2>;
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
|
||||||
* allow switching write protect / reset pin by gpio,
|
|
||||||
* because "pinctrl-assert-gpios" from &ecspi1 isn't handled by u-boot
|
|
||||||
*/
|
|
||||||
&gpio2 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
|
|
||||||
wp_spi_nor {
|
|
||||||
gpio-hog;
|
|
||||||
output-high;
|
|
||||||
gpios = <15 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
|
|
||||||
reset_spi_nor {
|
|
||||||
gpio-hog;
|
|
||||||
output-high;
|
|
||||||
gpios = <28 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&gpio4 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&ecspi1 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&flash {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
||||||
&pinctrl_ecspi1 {
|
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
};
|
|
||||||
|
|
@ -1,248 +0,0 @@
|
||||||
// SPDX-License-Identifier: (GPL-2.0)
|
|
||||||
/*
|
|
||||||
* support for the imx6 based aristainetos2b-csl board
|
|
||||||
*
|
|
||||||
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
|
||||||
* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
|
||||||
#include <dt-bindings/clock/imx6qdl-clock.h>
|
|
||||||
|
|
||||||
#include "imx6qdl-aristainetos2-common.dtsi"
|
|
||||||
|
|
||||||
/ {
|
|
||||||
leds {
|
|
||||||
compatible = "gpio-leds";
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_gpio>;
|
|
||||||
|
|
||||||
LED_blue {
|
|
||||||
label = "led_blue";
|
|
||||||
gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_green {
|
|
||||||
label = "led_green";
|
|
||||||
gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_red {
|
|
||||||
label = "led_red";
|
|
||||||
gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_yellow {
|
|
||||||
label = "led_yellow";
|
|
||||||
gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_blue_2 {
|
|
||||||
label = "led_blue2";
|
|
||||||
gpios = <&expander 15 GPIO_ACTIVE_LOW>;
|
|
||||||
default-state = "off";
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_green_2 {
|
|
||||||
label = "led_green2";
|
|
||||||
gpios = <&expander 14 GPIO_ACTIVE_LOW>;
|
|
||||||
default-state = "off";
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_red_2 {
|
|
||||||
label = "led_red2";
|
|
||||||
gpios = <&expander 12 GPIO_ACTIVE_LOW>;
|
|
||||||
default-state = "off";
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_yellow_2 {
|
|
||||||
label = "led_yellow2";
|
|
||||||
gpios = <&expander 13 GPIO_ACTIVE_LOW>;
|
|
||||||
default-state = "off";
|
|
||||||
};
|
|
||||||
|
|
||||||
LED_ena {
|
|
||||||
label = "led_ena";
|
|
||||||
gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&ecspi1 {
|
|
||||||
fsl,spi-num-chipselects = <3>;
|
|
||||||
cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH
|
|
||||||
&gpio4 10 GPIO_ACTIVE_HIGH
|
|
||||||
&gpio4 11 GPIO_ACTIVE_HIGH>;
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_ecspi1>;
|
|
||||||
status = "okay";
|
|
||||||
pinctrl-assert-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
|
|
||||||
pinctrl-assert-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
|
|
||||||
|
|
||||||
flash: m25p80@0 {
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
compatible = "micron,n25q128a11", "jedec,spi-nor";
|
|
||||||
spi-max-frequency = <20000000>;
|
|
||||||
reg = <0>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&ecspi4 {
|
|
||||||
fsl,spi-num-chipselects = <2>;
|
|
||||||
cs-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH &gpio5 2 GPIO_ACTIVE_HIGH>;
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_ecspi4>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&i2c1 {
|
|
||||||
tpm@20 {
|
|
||||||
compatible = "infineon,slb9645tt";
|
|
||||||
reg = <0x20>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&gpio7 {
|
|
||||||
wlan_reset {
|
|
||||||
gpio-hog;
|
|
||||||
output-high;
|
|
||||||
gpios = <8 GPIO_ACTIVE_HIGH>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&gpmi {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&usdhc1 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
|
||||||
cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&usdhc2 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
|
||||||
no-1-8-v;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&iomuxc {
|
|
||||||
pinctrl_ecspi1: ecspi1grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
|
|
||||||
/* SS0# */
|
|
||||||
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
|
|
||||||
/* SS1# */
|
|
||||||
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x100b1
|
|
||||||
/* SS2# */
|
|
||||||
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x100b1
|
|
||||||
/* WP pin NOR Flash */
|
|
||||||
MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x4001b0b0
|
|
||||||
/* Flash nReset */
|
|
||||||
MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x4001b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_ecspi4: ecspi4grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
|
|
||||||
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x100b1 /* SS0# */
|
|
||||||
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 /* SS1# */
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_gpio: gpiogrp {
|
|
||||||
fsl,pins = <
|
|
||||||
/* led enable */
|
|
||||||
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x4001b0b0
|
|
||||||
/* LCD power enable */
|
|
||||||
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x4001b0b0
|
|
||||||
/* led yellow */
|
|
||||||
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x4001b0b0
|
|
||||||
/* led red */
|
|
||||||
MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x4001b0b0
|
|
||||||
/* led green */
|
|
||||||
MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x4001b0b0
|
|
||||||
/* led blue */
|
|
||||||
MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x4001b0b0
|
|
||||||
/* Profibus IRQ */
|
|
||||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
|
|
||||||
/* FPGA IRQ currently unused*/
|
|
||||||
MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0
|
|
||||||
/* Display reset because of clock failure */
|
|
||||||
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b0
|
|
||||||
/* spi bus #2 SS driver enable */
|
|
||||||
MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x4001b0b0
|
|
||||||
/* RST_LOC# PHY reset input (has pull-down!)*/
|
|
||||||
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x4001b0b0
|
|
||||||
/* Touchscreen IRQ */
|
|
||||||
MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
|
|
||||||
/* PCIe reset */
|
|
||||||
MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x4001b0b0
|
|
||||||
/* make sure pin is GPIO and not ENET_REF_CLK */
|
|
||||||
MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x4001a0b0
|
|
||||||
/* WLAN Module Reset# */
|
|
||||||
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x4001b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_gpmi_nand: gpmi-nand {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
|
||||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
|
||||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
|
||||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
|
||||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_usbotg: usbotggrp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
|
|
||||||
MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_usdhc1: usdhc1grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
|
|
||||||
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
|
|
||||||
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
|
|
||||||
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
|
|
||||||
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
|
|
||||||
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
|
|
||||||
/* SD1 card detect input */
|
|
||||||
MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pinctrl_usdhc2: usdhc2grp {
|
|
||||||
fsl,pins = <
|
|
||||||
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x71
|
|
||||||
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x71
|
|
||||||
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x71
|
|
||||||
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x71
|
|
||||||
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x71
|
|
||||||
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x71
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
// SPDX-License-Identifier: (GPL-2.0)
|
// SPDX-License-Identifier: (GPL-2.0)
|
||||||
/*
|
/*
|
||||||
* support for the imx6 based aristainetos2c board
|
* support for the imx6 based aristainetos2c+2d boards
|
||||||
*
|
*
|
||||||
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
|
||||||
* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
|
* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
|
||||||
|
|
@ -79,6 +79,14 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&gpio7 {
|
||||||
|
eMMC_reset {
|
||||||
|
gpio-hog;
|
||||||
|
output-high;
|
||||||
|
gpios = <8 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
&can1 {
|
&can1 {
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_flexcan1>;
|
pinctrl-0 = <&pinctrl_flexcan1>;
|
||||||
|
|
@ -172,6 +180,8 @@
|
||||||
MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x4001b0b0
|
MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x4001b0b0
|
||||||
/* TPM Reset */
|
/* TPM Reset */
|
||||||
MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x4001b0b0
|
MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x4001b0b0
|
||||||
|
/* eMMC Reset# */
|
||||||
|
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x4001b0b0
|
||||||
>;
|
>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -128,39 +128,6 @@ config TARGET_APALIS_IMX6
|
||||||
imply CMD_DM
|
imply CMD_DM
|
||||||
imply CMD_SATA
|
imply CMD_SATA
|
||||||
|
|
||||||
config TARGET_ARISTAINETOS2
|
|
||||||
bool "aristainetos2"
|
|
||||||
depends on MX6DL
|
|
||||||
select BOARD_LATE_INIT
|
|
||||||
select SYS_I2C_MXC
|
|
||||||
select MXC_UART
|
|
||||||
select FEC_MXC
|
|
||||||
select DM
|
|
||||||
imply CMD_SATA
|
|
||||||
imply CMD_DM
|
|
||||||
|
|
||||||
config TARGET_ARISTAINETOS2B
|
|
||||||
bool "Support aristainetos2-revB"
|
|
||||||
depends on MX6DL
|
|
||||||
select BOARD_LATE_INIT
|
|
||||||
select SYS_I2C_MXC
|
|
||||||
select MXC_UART
|
|
||||||
select FEC_MXC
|
|
||||||
select DM
|
|
||||||
imply CMD_SATA
|
|
||||||
imply CMD_DM
|
|
||||||
|
|
||||||
config TARGET_ARISTAINETOS2BCSL
|
|
||||||
bool "Support aristainetos2-revB CSL"
|
|
||||||
depends on MX6DL
|
|
||||||
select BOARD_LATE_INIT
|
|
||||||
select SYS_I2C_MXC
|
|
||||||
select MXC_UART
|
|
||||||
select FEC_MXC
|
|
||||||
select DM
|
|
||||||
imply CMD_SATA
|
|
||||||
imply CMD_DM
|
|
||||||
|
|
||||||
config TARGET_ARISTAINETOS2C
|
config TARGET_ARISTAINETOS2C
|
||||||
bool "Support aristainetos2-revC"
|
bool "Support aristainetos2-revC"
|
||||||
depends on MX6DL
|
depends on MX6DL
|
||||||
|
|
|
||||||
|
|
@ -1,39 +1,3 @@
|
||||||
if TARGET_ARISTAINETOS2
|
|
||||||
|
|
||||||
source "board/aristainetos/common/Kconfig"
|
|
||||||
|
|
||||||
config SYS_BOARD
|
|
||||||
default "aristainetos"
|
|
||||||
|
|
||||||
config SYS_BOARD_VERSION
|
|
||||||
default 2
|
|
||||||
|
|
||||||
endif
|
|
||||||
|
|
||||||
if TARGET_ARISTAINETOS2B
|
|
||||||
|
|
||||||
source "board/aristainetos/common/Kconfig"
|
|
||||||
|
|
||||||
config SYS_BOARD
|
|
||||||
default "aristainetos"
|
|
||||||
|
|
||||||
config SYS_BOARD_VERSION
|
|
||||||
default 3
|
|
||||||
|
|
||||||
endif
|
|
||||||
|
|
||||||
if TARGET_ARISTAINETOS2BCSL
|
|
||||||
|
|
||||||
source "board/aristainetos/common/Kconfig"
|
|
||||||
|
|
||||||
config SYS_BOARD
|
|
||||||
default "aristainetos"
|
|
||||||
|
|
||||||
config SYS_BOARD_VERSION
|
|
||||||
default 4
|
|
||||||
|
|
||||||
endif
|
|
||||||
|
|
||||||
if TARGET_ARISTAINETOS2C
|
if TARGET_ARISTAINETOS2C
|
||||||
|
|
||||||
source "board/aristainetos/common/Kconfig"
|
source "board/aristainetos/common/Kconfig"
|
||||||
|
|
|
||||||
|
|
@ -3,34 +3,11 @@ M: Heiko Schocher <hs@denx.de>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: board/aristainetos/
|
F: board/aristainetos/
|
||||||
F: include/configs/aristainetos2.h
|
F: include/configs/aristainetos2.h
|
||||||
F: configs/aristainetos2_defconfig
|
|
||||||
F: configs/aristainetos2b_defconfig
|
|
||||||
F: configs/aristainetos2bcsl_defconfig
|
|
||||||
F: configs/aristainetos2c_defconfig
|
F: configs/aristainetos2c_defconfig
|
||||||
F: arch/arm/dts/imx6qdl-aristainetos2.dtsi
|
|
||||||
F: arch/arm/dts/imx6qdl-aristainetos2-common.dtsi
|
|
||||||
F: arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2_7.dts
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2_7.dtsi
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2_7-u-boot.dtsi
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2_4.dts
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2_4.dtsi
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2_4-u-boot.dtsi
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2b_4.dts
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2b_4-u-boot.dtsi
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2b_7.dts
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2b_7-u-boot.dtsi
|
|
||||||
F: arch/arm/dts/imx6qdl-aristainetos2b-u-boot.dtsi
|
|
||||||
F: arch/arm/dts/imx6qdl-aristainetos2b.dtsi
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2b_csl_4.dts
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2b_csl_4-u-boot.dtsi
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2b_csl_7.dts
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2b_csl_7-u-boot.dtsi
|
|
||||||
F: arch/arm/dts/imx6qdl-aristainetos2b_csl.dtsi
|
|
||||||
F: arch/arm/dts/imx6qdl-aristainetos2b_csl-u-boot.dtsi
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2c_4.dts
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2c_4-u-boot.dtsi
|
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2c_7.dts
|
F: arch/arm/dts/imx6dl-aristainetos2c_7.dts
|
||||||
F: arch/arm/dts/imx6dl-aristainetos2c_7-u-boot.dtsi
|
F: arch/arm/dts/imx6dl-aristainetos2c_7-u-boot.dtsi
|
||||||
|
F: arch/arm/dts/imx6dl-aristainetos2_7.dtsi
|
||||||
|
F: arch/arm/dts/imx6qdl-aristainetos2-common.dtsi
|
||||||
|
F: arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi
|
||||||
F: arch/arm/dts/imx6qdl-aristainetos2c.dtsi
|
F: arch/arm/dts/imx6qdl-aristainetos2c.dtsi
|
||||||
F: arch/arm/dts/imx6qdl-aristainetos2c-u-boot.dtsi
|
F: arch/arm/dts/imx6qdl-aristainetos2c-u-boot.dtsi
|
||||||
|
|
|
||||||
|
|
@ -194,87 +194,6 @@ static void enable_lvds(struct display_info_t const *dev)
|
||||||
writel(reg, &iomux->gpr[3]);
|
writel(reg, &iomux->gpr[3]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void enable_spi_display(struct display_info_t const *dev)
|
|
||||||
{
|
|
||||||
struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
|
|
||||||
struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
|
|
||||||
int reg;
|
|
||||||
s32 timeout = 100000;
|
|
||||||
|
|
||||||
#if defined(CONFIG_VIDEO_BMP_LOGO)
|
|
||||||
rotate_logo(3); /* portrait display in landscape mode */
|
|
||||||
#endif
|
|
||||||
|
|
||||||
reg = readl(&ccm->cs2cdr);
|
|
||||||
|
|
||||||
/* select pll 5 clock */
|
|
||||||
reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK
|
|
||||||
| MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
|
|
||||||
writel(reg, &ccm->cs2cdr);
|
|
||||||
|
|
||||||
/* set PLL5 to 197994996Hz */
|
|
||||||
reg &= ~BM_ANADIG_PLL_VIDEO_DIV_SELECT;
|
|
||||||
reg |= BF_ANADIG_PLL_VIDEO_DIV_SELECT(0x21);
|
|
||||||
reg &= ~BM_ANADIG_PLL_VIDEO_POST_DIV_SELECT;
|
|
||||||
reg |= BF_ANADIG_PLL_VIDEO_POST_DIV_SELECT(0);
|
|
||||||
writel(reg, &ccm->analog_pll_video);
|
|
||||||
|
|
||||||
writel(BF_ANADIG_PLL_VIDEO_NUM_A(0xfbf4),
|
|
||||||
&ccm->analog_pll_video_num);
|
|
||||||
writel(BF_ANADIG_PLL_VIDEO_DENOM_B(0xf4240),
|
|
||||||
&ccm->analog_pll_video_denom);
|
|
||||||
|
|
||||||
reg &= ~BM_ANADIG_PLL_VIDEO_POWERDOWN;
|
|
||||||
writel(reg, &ccm->analog_pll_video);
|
|
||||||
|
|
||||||
while (timeout--)
|
|
||||||
if (readl(&ccm->analog_pll_video) & BM_ANADIG_PLL_VIDEO_LOCK)
|
|
||||||
break;
|
|
||||||
if (timeout < 0)
|
|
||||||
printf("Warning: video pll lock timeout!\n");
|
|
||||||
|
|
||||||
reg = readl(&ccm->analog_pll_video);
|
|
||||||
reg |= BM_ANADIG_PLL_VIDEO_ENABLE;
|
|
||||||
reg &= ~BM_ANADIG_PLL_VIDEO_BYPASS;
|
|
||||||
writel(reg, &ccm->analog_pll_video);
|
|
||||||
|
|
||||||
/* set LDB0, LDB1 clk select to 000/000 (PLL5 clock) */
|
|
||||||
reg = readl(&ccm->cs2cdr);
|
|
||||||
reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK
|
|
||||||
| MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
|
|
||||||
reg |= (0 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)
|
|
||||||
| (0 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);
|
|
||||||
writel(reg, &ccm->cs2cdr);
|
|
||||||
|
|
||||||
reg = readl(&ccm->cscmr2);
|
|
||||||
reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV;
|
|
||||||
writel(reg, &ccm->cscmr2);
|
|
||||||
|
|
||||||
reg = readl(&ccm->chsccdr);
|
|
||||||
reg |= (CHSCCDR_CLK_SEL_LDB_DI0
|
|
||||||
<< MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
|
|
||||||
reg &= ~MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK;
|
|
||||||
reg |= (2 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET);
|
|
||||||
reg &= ~MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK;
|
|
||||||
reg |= (2 << MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET);
|
|
||||||
writel(reg, &ccm->chsccdr);
|
|
||||||
|
|
||||||
reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES
|
|
||||||
| IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH
|
|
||||||
| IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_HIGH
|
|
||||||
| IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG
|
|
||||||
| IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT
|
|
||||||
| IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED
|
|
||||||
| IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0;
|
|
||||||
writel(reg, &iomux->gpr[2]);
|
|
||||||
|
|
||||||
reg = readl(&iomux->gpr[3]);
|
|
||||||
reg = (reg & ~IOMUXC_GPR3_LVDS0_MUX_CTL_MASK)
|
|
||||||
| (IOMUXC_GPR3_MUX_SRC_IPU1_DI0
|
|
||||||
<< IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
|
|
||||||
writel(reg, &iomux->gpr[3]);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void setup_display(void)
|
static void setup_display(void)
|
||||||
{
|
{
|
||||||
enable_ipu_clock();
|
enable_ipu_clock();
|
||||||
|
|
@ -331,25 +250,36 @@ static void setup_board_gpio(void)
|
||||||
setup_one_led("led_blue", LEDST_OFF);
|
setup_one_led("led_blue", LEDST_OFF);
|
||||||
}
|
}
|
||||||
|
|
||||||
#define ARI_RESC_FMT "setenv rescue_reason setenv bootargs \\${bootargs}" \
|
|
||||||
" rescueReason=%d "
|
|
||||||
|
|
||||||
static void aristainetos_run_rescue_command(int reason)
|
static void aristainetos_run_rescue_command(int reason)
|
||||||
{
|
{
|
||||||
char rescue_reason_command[80];
|
char rescue_reason_command[20];
|
||||||
|
|
||||||
sprintf(rescue_reason_command, ARI_RESC_FMT, reason);
|
sprintf(rescue_reason_command, "setenv rreason %d", reason);
|
||||||
run_command(rescue_reason_command, 0);
|
run_command(rescue_reason_command, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int aristainetos_eeprom(void)
|
static int aristainetos_bootmode_settings(void)
|
||||||
{
|
{
|
||||||
|
struct gpio_desc *desc;
|
||||||
|
struct src *psrc = (struct src *)SRC_BASE_ADDR;
|
||||||
|
unsigned int sbmr1 = readl(&psrc->sbmr1);
|
||||||
|
char *my_bootdelay;
|
||||||
|
char bootmode = 0;
|
||||||
|
int ret;
|
||||||
struct udevice *dev;
|
struct udevice *dev;
|
||||||
int off;
|
int off;
|
||||||
int ret;
|
|
||||||
u8 data[0x10];
|
u8 data[0x10];
|
||||||
u8 rescue_reason;
|
u8 rescue_reason;
|
||||||
|
|
||||||
|
/* jumper controlled reset of the environment */
|
||||||
|
ret = gpio_hog_lookup_name("env_reset", &desc);
|
||||||
|
if (!ret) {
|
||||||
|
if (dm_gpio_get_value(desc)) {
|
||||||
|
printf("\nReset u-boot environment (jumper)\n");
|
||||||
|
run_command("run default_env; saveenv; saveenv", 0);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
off = fdt_path_offset(gd->fdt_blob, "eeprom0");
|
off = fdt_path_offset(gd->fdt_blob, "eeprom0");
|
||||||
if (off < 0) {
|
if (off < 0) {
|
||||||
printf("%s: No eeprom0 path offset\n", __func__);
|
printf("%s: No eeprom0 path offset\n", __func__);
|
||||||
|
|
@ -366,37 +296,26 @@ static int aristainetos_eeprom(void)
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
ret = i2c_eeprom_read(dev, 0x1ff0, (uint8_t *)data, 6);
|
ret = i2c_eeprom_read(dev, 0x1ff0, (uint8_t *)data, sizeof(data));
|
||||||
if (ret) {
|
if (ret) {
|
||||||
printf("%s: Could not read EEPROM\n", __func__);
|
printf("%s: Could not read EEPROM\n", __func__);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (strncmp((char *)&data[3], "ReScUe", 6) == 0) {
|
/* software controlled reset of the environment (EEPROM magic) */
|
||||||
rescue_reason = *(uint8_t *)&data[9];
|
if (strncmp((char *)data, "DeF", 3) == 0) {
|
||||||
memset(&data[3], 0xff, 7);
|
|
||||||
i2c_eeprom_write(dev, 0x1ff0, (uint8_t *)&data[3], 7);
|
|
||||||
printf("\nBooting into Rescue System (EEPROM)\n");
|
|
||||||
aristainetos_run_rescue_command(rescue_reason);
|
|
||||||
run_command("run rescue_load_fit rescueboot", 0);
|
|
||||||
} else if (strncmp((char *)data, "DeF", 3) == 0) {
|
|
||||||
memset(data, 0xff, 3);
|
memset(data, 0xff, 3);
|
||||||
i2c_eeprom_write(dev, 0x1ff0, (uint8_t *)data, 3);
|
i2c_eeprom_write(dev, 0x1ff0, (uint8_t *)data, 3);
|
||||||
printf("\nClear u-boot environment (set back to defaults)\n");
|
printf("\nReset u-boot environment (EEPROM)\n");
|
||||||
run_command("run default_env; saveenv; saveenv", 0);
|
run_command("run default_env; saveenv; saveenv", 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
if (sbmr1 & 0x40) {
|
||||||
};
|
env_set("bootmode", "1");
|
||||||
|
printf("SD bootmode jumper set!\n");
|
||||||
static void aristainetos_bootmode_settings(void)
|
} else {
|
||||||
{
|
env_set("bootmode", "0");
|
||||||
struct gpio_desc *desc;
|
}
|
||||||
struct src *psrc = (struct src *)SRC_BASE_ADDR;
|
|
||||||
unsigned int sbmr1 = readl(&psrc->sbmr1);
|
|
||||||
char *my_bootdelay;
|
|
||||||
char bootmode = 0;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Check the boot-source. If booting from NOR Flash,
|
* Check the boot-source. If booting from NOR Flash,
|
||||||
|
|
@ -420,28 +339,27 @@ static void aristainetos_bootmode_settings(void)
|
||||||
env_set("bootdelay", "-2");
|
env_set("bootdelay", "-2");
|
||||||
}
|
}
|
||||||
|
|
||||||
if (sbmr1 & 0x40) {
|
/* jumper controlled boot of the rescue system */
|
||||||
env_set("bootmode", "1");
|
|
||||||
printf("SD bootmode jumper set!\n");
|
|
||||||
} else {
|
|
||||||
env_set("bootmode", "0");
|
|
||||||
}
|
|
||||||
|
|
||||||
/* read out some jumper values*/
|
|
||||||
ret = gpio_hog_lookup_name("env_reset", &desc);
|
|
||||||
if (!ret) {
|
|
||||||
if (dm_gpio_get_value(desc)) {
|
|
||||||
printf("\nClear env (set back to defaults)\n");
|
|
||||||
run_command("run default_env; saveenv; saveenv", 0);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
ret = gpio_hog_lookup_name("boot_rescue", &desc);
|
ret = gpio_hog_lookup_name("boot_rescue", &desc);
|
||||||
if (!ret) {
|
if (!ret) {
|
||||||
if (dm_gpio_get_value(desc)) {
|
if (dm_gpio_get_value(desc)) {
|
||||||
|
printf("\nBooting into Rescue System (jumper)\n");
|
||||||
aristainetos_run_rescue_command(16);
|
aristainetos_run_rescue_command(16);
|
||||||
run_command("run rescue_xload_boot", 0);
|
run_command("run rescue_xload_boot", 0);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* software controlled boot of the rescue system (EEPROM magic) */
|
||||||
|
if (strncmp((char *)&data[3], "ReScUe", 6) == 0) {
|
||||||
|
rescue_reason = *(uint8_t *)&data[9];
|
||||||
|
memset(&data[3], 0xff, 7);
|
||||||
|
i2c_eeprom_write(dev, 0x1ff0, (uint8_t *)&data[3], 7);
|
||||||
|
printf("\nBooting into Rescue System (EEPROM)\n");
|
||||||
|
aristainetos_run_rescue_command(rescue_reason);
|
||||||
|
run_command("run rescue_xload_boot", 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(CONFIG_DM_PMIC_DA9063)
|
#if defined(CONFIG_DM_PMIC_DA9063)
|
||||||
|
|
@ -497,15 +415,15 @@ static int setup_pmic_voltages(void)
|
||||||
int board_late_init(void)
|
int board_late_init(void)
|
||||||
{
|
{
|
||||||
int x, y;
|
int x, y;
|
||||||
|
int ret;
|
||||||
|
|
||||||
led_default_state();
|
led_default_state();
|
||||||
splash_get_pos(&x, &y);
|
splash_get_pos(&x, &y);
|
||||||
bmp_display((ulong)&bmp_logo_bitmap[0], x, y);
|
bmp_display((ulong)&bmp_logo_bitmap[0], x, y);
|
||||||
|
|
||||||
aristainetos_bootmode_settings();
|
ret = aristainetos_bootmode_settings();
|
||||||
|
if (ret)
|
||||||
/* eeprom work */
|
return ret;
|
||||||
aristainetos_eeprom();
|
|
||||||
|
|
||||||
/* set board_type */
|
/* set board_type */
|
||||||
if (gd->board_type == BOARD_TYPE_4)
|
if (gd->board_type == BOARD_TYPE_4)
|
||||||
|
|
@ -549,97 +467,9 @@ struct display_info_t const displays[] = {
|
||||||
.vmode = FB_VMODE_NONINTERLACED
|
.vmode = FB_VMODE_NONINTERLACED
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#if ((CONFIG_SYS_BOARD_VERSION == 2) || \
|
|
||||||
(CONFIG_SYS_BOARD_VERSION == 3) || \
|
|
||||||
(CONFIG_SYS_BOARD_VERSION == 4) || \
|
|
||||||
(CONFIG_SYS_BOARD_VERSION == 5))
|
|
||||||
, {
|
|
||||||
.bus = -1,
|
|
||||||
.addr = 0,
|
|
||||||
.pixfmt = IPU_PIX_FMT_RGB24,
|
|
||||||
.detect = NULL,
|
|
||||||
.enable = enable_spi_display,
|
|
||||||
.mode = {
|
|
||||||
.name = "lg4573",
|
|
||||||
.refresh = 57,
|
|
||||||
.xres = 480,
|
|
||||||
.yres = 800,
|
|
||||||
.pixclock = 37037,
|
|
||||||
.left_margin = 59,
|
|
||||||
.right_margin = 10,
|
|
||||||
.upper_margin = 15,
|
|
||||||
.lower_margin = 15,
|
|
||||||
.hsync_len = 10,
|
|
||||||
.vsync_len = 15,
|
|
||||||
.sync = FB_SYNC_EXT | FB_SYNC_HOR_HIGH_ACT |
|
|
||||||
FB_SYNC_VERT_HIGH_ACT,
|
|
||||||
.vmode = FB_VMODE_NONINTERLACED
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
};
|
};
|
||||||
size_t display_count = ARRAY_SIZE(displays);
|
size_t display_count = ARRAY_SIZE(displays);
|
||||||
|
|
||||||
#if defined(CONFIG_MTD_RAW_NAND)
|
|
||||||
iomux_v3_cfg_t nfc_pads[] = {
|
|
||||||
MX6_PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_NANDF_WP_B__NAND_WP_B | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_NANDF_RB0__NAND_READY_B | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_SD4_CMD__NAND_RE_B | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_SD4_CLK__NAND_WE_B | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_NANDF_D0__NAND_DATA00 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_NANDF_D1__NAND_DATA01 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_NANDF_D2__NAND_DATA02 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_NANDF_D3__NAND_DATA03 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_NANDF_D4__NAND_DATA04 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_NANDF_D5__NAND_DATA05 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_NANDF_D6__NAND_DATA06 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_NANDF_D7__NAND_DATA07 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
MX6_PAD_SD4_DAT0__NAND_DQS | MUX_PAD_CTRL(NO_PAD_CTRL),
|
|
||||||
};
|
|
||||||
|
|
||||||
static void setup_gpmi_nand(void)
|
|
||||||
{
|
|
||||||
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
|
|
||||||
|
|
||||||
/* config gpmi nand iomux */
|
|
||||||
imx_iomux_v3_setup_multiple_pads(nfc_pads,
|
|
||||||
ARRAY_SIZE(nfc_pads));
|
|
||||||
|
|
||||||
/* gate ENFC_CLK_ROOT clock first,before clk source switch */
|
|
||||||
clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
|
|
||||||
|
|
||||||
/* config gpmi and bch clock to 100 MHz */
|
|
||||||
clrsetbits_le32(&mxc_ccm->cs2cdr,
|
|
||||||
MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK |
|
|
||||||
MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK |
|
|
||||||
MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK,
|
|
||||||
MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) |
|
|
||||||
MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) |
|
|
||||||
MXC_CCM_CS2CDR_ENFC_CLK_SEL(3));
|
|
||||||
|
|
||||||
/* enable ENFC_CLK_ROOT clock */
|
|
||||||
setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
|
|
||||||
|
|
||||||
/* enable gpmi and bch clock gating */
|
|
||||||
setbits_le32(&mxc_ccm->CCGR4,
|
|
||||||
MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK |
|
|
||||||
MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK |
|
|
||||||
MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK |
|
|
||||||
MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK |
|
|
||||||
MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET);
|
|
||||||
|
|
||||||
/* enable apbh clock gating */
|
|
||||||
setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);
|
|
||||||
}
|
|
||||||
#else
|
|
||||||
static void setup_gpmi_nand(void)
|
|
||||||
{
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
int board_init(void)
|
int board_init(void)
|
||||||
{
|
{
|
||||||
struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
|
struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
|
||||||
|
|
@ -648,7 +478,6 @@ int board_init(void)
|
||||||
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
|
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
|
||||||
|
|
||||||
setup_board_gpio();
|
setup_board_gpio();
|
||||||
setup_gpmi_nand();
|
|
||||||
setup_display();
|
setup_display();
|
||||||
|
|
||||||
/* GPIO_1 for USB_OTG_ID */
|
/* GPIO_1 for USB_OTG_ID */
|
||||||
|
|
|
||||||
|
|
@ -2,10 +2,7 @@ config SYS_BOARD_VERSION
|
||||||
int "select version of aristainetos board"
|
int "select version of aristainetos board"
|
||||||
help
|
help
|
||||||
version of aristainetos board version
|
version of aristainetos board version
|
||||||
2 version 2
|
5 version 2c and 2d
|
||||||
3 version 2b
|
|
||||||
4 version 2bcsl
|
|
||||||
5 version 2c
|
|
||||||
|
|
||||||
config SYS_I2C_MXC_I2C1
|
config SYS_I2C_MXC_I2C1
|
||||||
default y
|
default y
|
||||||
|
|
|
||||||
|
|
@ -1,121 +0,0 @@
|
||||||
CONFIG_ARM=y
|
|
||||||
CONFIG_ARCH_MX6=y
|
|
||||||
CONFIG_SYS_TEXT_BASE=0x17800000
|
|
||||||
CONFIG_SYS_MALLOC_F_LEN=0xe000
|
|
||||||
CONFIG_NR_DRAM_BANKS=1
|
|
||||||
CONFIG_ENV_OFFSET=0xD0000
|
|
||||||
CONFIG_MX6DL=y
|
|
||||||
CONFIG_TARGET_ARISTAINETOS2=y
|
|
||||||
CONFIG_DM_GPIO=y
|
|
||||||
CONFIG_ENV_OFFSET_REDUND=0xE0000
|
|
||||||
CONFIG_IMX_HAB=y
|
|
||||||
# CONFIG_CMD_DEKBLOB is not set
|
|
||||||
# CONFIG_CMD_NANDBCB is not set
|
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2_4"
|
|
||||||
CONFIG_FIT=y
|
|
||||||
CONFIG_SUPPORT_RAW_INITRD=y
|
|
||||||
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg"
|
|
||||||
CONFIG_BOOTDELAY=3
|
|
||||||
CONFIG_AUTOBOOT_KEYED=y
|
|
||||||
CONFIG_AUTOBOOT_ENCRYPTION=y
|
|
||||||
CONFIG_AUTOBOOT_STOP_STR_SHA256="30bb0bce5f77da71a6e8e436fe40af54bc823db9501ae170f77e9992499d88fb"
|
|
||||||
CONFIG_USE_BOOTCOMMAND=y
|
|
||||||
CONFIG_BOOTCOMMAND="run ari_boot"
|
|
||||||
# CONFIG_CONSOLE_MUX is not set
|
|
||||||
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
|
||||||
CONFIG_BOARD_TYPES=y
|
|
||||||
CONFIG_BOARD_EARLY_INIT_F=y
|
|
||||||
CONFIG_HUSH_PARSER=y
|
|
||||||
CONFIG_CMD_BOOTZ=y
|
|
||||||
# CONFIG_BOOTM_NETBSD is not set
|
|
||||||
# CONFIG_BOOTM_PLAN9 is not set
|
|
||||||
# CONFIG_BOOTM_RTEMS is not set
|
|
||||||
# CONFIG_BOOTM_VXWORKS is not set
|
|
||||||
# CONFIG_CMD_FLASH is not set
|
|
||||||
CONFIG_CMD_GPIO=y
|
|
||||||
CONFIG_CMD_I2C=y
|
|
||||||
CONFIG_CMD_MMC=y
|
|
||||||
CONFIG_CMD_NAND_TRIMFFS=y
|
|
||||||
# CONFIG_CMD_PINMUX is not set
|
|
||||||
# CONFIG_CMD_SATA is not set
|
|
||||||
CONFIG_CMD_USB=y
|
|
||||||
CONFIG_CMD_DHCP=y
|
|
||||||
CONFIG_CMD_MII=y
|
|
||||||
CONFIG_CMD_PING=y
|
|
||||||
CONFIG_CMD_BMP=y
|
|
||||||
CONFIG_CMD_CACHE=y
|
|
||||||
# CONFIG_CMD_HASH is not set
|
|
||||||
CONFIG_CMD_EXT2=y
|
|
||||||
CONFIG_CMD_EXT4=y
|
|
||||||
CONFIG_CMD_EXT4_WRITE=y
|
|
||||||
CONFIG_CMD_FAT=y
|
|
||||||
CONFIG_CMD_FS_GENERIC=y
|
|
||||||
CONFIG_CMD_MTDPARTS=y
|
|
||||||
CONFIG_CMD_UBI=y
|
|
||||||
CONFIG_OF_CONTROL=y
|
|
||||||
CONFIG_OF_LIST="imx6dl-aristainetos2_4 imx6dl-aristainetos2_7"
|
|
||||||
CONFIG_DTB_RESELECT=y
|
|
||||||
CONFIG_MULTI_DTB_FIT=y
|
|
||||||
CONFIG_ENV_OVERWRITE=y
|
|
||||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
|
||||||
CONFIG_ENV_SPI_EARLY=y
|
|
||||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
|
||||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
||||||
CONFIG_VERSION_VARIABLE=y
|
|
||||||
CONFIG_BOUNCE_BUFFER=y
|
|
||||||
CONFIG_GPIO_HOG=y
|
|
||||||
CONFIG_DM_GPIO_LOOKUP_LABEL=y
|
|
||||||
CONFIG_DM_PCA953X=y
|
|
||||||
CONFIG_DM_I2C=y
|
|
||||||
CONFIG_LED=y
|
|
||||||
CONFIG_LED_GPIO=y
|
|
||||||
CONFIG_MISC=y
|
|
||||||
CONFIG_I2C_EEPROM=y
|
|
||||||
CONFIG_DM_MMC=y
|
|
||||||
CONFIG_FSL_USDHC=y
|
|
||||||
CONFIG_MTD=y
|
|
||||||
CONFIG_MTD_RAW_NAND=y
|
|
||||||
CONFIG_NAND_MXS=y
|
|
||||||
CONFIG_DM_SPI_FLASH=y
|
|
||||||
CONFIG_SF_DEFAULT_BUS=3
|
|
||||||
CONFIG_SF_DEFAULT_CS=1
|
|
||||||
CONFIG_SF_DEFAULT_MODE=0
|
|
||||||
CONFIG_SF_DEFAULT_SPEED=20000000
|
|
||||||
CONFIG_SPI_FLASH_STMICRO=y
|
|
||||||
CONFIG_SPI_FLASH_MTD=y
|
|
||||||
CONFIG_MTD_UBI_FASTMAP=y
|
|
||||||
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
|
|
||||||
CONFIG_PHYLIB=y
|
|
||||||
CONFIG_PHY_MICREL=y
|
|
||||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
|
||||||
CONFIG_DM_ETH=y
|
|
||||||
CONFIG_MII=y
|
|
||||||
CONFIG_PHY=y
|
|
||||||
CONFIG_PINCTRL=y
|
|
||||||
CONFIG_PINCTRL_IMX6=y
|
|
||||||
CONFIG_DM_PMIC=y
|
|
||||||
CONFIG_DM_REGULATOR=y
|
|
||||||
CONFIG_DM_REGULATOR_FIXED=y
|
|
||||||
CONFIG_DM_PWM=y
|
|
||||||
CONFIG_PWM_IMX=y
|
|
||||||
CONFIG_DM_RTC=y
|
|
||||||
CONFIG_RTC_DS1307=y
|
|
||||||
CONFIG_DM_SERIAL=y
|
|
||||||
CONFIG_SPI=y
|
|
||||||
CONFIG_DM_SPI=y
|
|
||||||
CONFIG_MXC_SPI=y
|
|
||||||
CONFIG_SYSRESET=y
|
|
||||||
CONFIG_SYSRESET_WATCHDOG=y
|
|
||||||
CONFIG_USB=y
|
|
||||||
CONFIG_DM_USB=y
|
|
||||||
CONFIG_USB_STORAGE=y
|
|
||||||
CONFIG_DM_VIDEO=y
|
|
||||||
CONFIG_SYS_WHITE_ON_BLACK=y
|
|
||||||
CONFIG_DISPLAY=y
|
|
||||||
CONFIG_VIDEO_IPUV3=y
|
|
||||||
CONFIG_SPLASH_SCREEN=y
|
|
||||||
CONFIG_SPLASH_SCREEN_ALIGN=y
|
|
||||||
CONFIG_VIDEO_BMP_RLE8=y
|
|
||||||
CONFIG_BMP_16BPP=y
|
|
||||||
CONFIG_IMX_WATCHDOG=y
|
|
||||||
# CONFIG_EFI_LOADER is not set
|
|
||||||
|
|
@ -1,115 +0,0 @@
|
||||||
CONFIG_ARM=y
|
|
||||||
CONFIG_ARCH_MX6=y
|
|
||||||
CONFIG_SYS_TEXT_BASE=0x17800000
|
|
||||||
CONFIG_SYS_MALLOC_F_LEN=0xe000
|
|
||||||
CONFIG_NR_DRAM_BANKS=1
|
|
||||||
CONFIG_ENV_OFFSET=0xD0000
|
|
||||||
CONFIG_MX6DL=y
|
|
||||||
CONFIG_TARGET_ARISTAINETOS2B=y
|
|
||||||
CONFIG_DM_GPIO=y
|
|
||||||
CONFIG_ENV_OFFSET_REDUND=0xE0000
|
|
||||||
CONFIG_IMX_HAB=y
|
|
||||||
# CONFIG_CMD_DEKBLOB is not set
|
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2b_4"
|
|
||||||
CONFIG_FIT=y
|
|
||||||
CONFIG_SUPPORT_RAW_INITRD=y
|
|
||||||
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg"
|
|
||||||
CONFIG_BOOTDELAY=3
|
|
||||||
CONFIG_AUTOBOOT_KEYED=y
|
|
||||||
CONFIG_AUTOBOOT_ENCRYPTION=y
|
|
||||||
CONFIG_AUTOBOOT_STOP_STR_SHA256="30bb0bce5f77da71a6e8e436fe40af54bc823db9501ae170f77e9992499d88fb"
|
|
||||||
CONFIG_USE_BOOTCOMMAND=y
|
|
||||||
CONFIG_BOOTCOMMAND="run ari_boot"
|
|
||||||
# CONFIG_CONSOLE_MUX is not set
|
|
||||||
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
|
||||||
CONFIG_BOARD_TYPES=y
|
|
||||||
CONFIG_BOARD_EARLY_INIT_F=y
|
|
||||||
CONFIG_HUSH_PARSER=y
|
|
||||||
CONFIG_CMD_BOOTZ=y
|
|
||||||
# CONFIG_BOOTM_NETBSD is not set
|
|
||||||
# CONFIG_BOOTM_PLAN9 is not set
|
|
||||||
# CONFIG_BOOTM_RTEMS is not set
|
|
||||||
# CONFIG_BOOTM_VXWORKS is not set
|
|
||||||
# CONFIG_CMD_FLASH is not set
|
|
||||||
CONFIG_CMD_GPIO=y
|
|
||||||
CONFIG_CMD_I2C=y
|
|
||||||
CONFIG_CMD_MMC=y
|
|
||||||
# CONFIG_CMD_PINMUX is not set
|
|
||||||
# CONFIG_CMD_SATA is not set
|
|
||||||
CONFIG_CMD_USB=y
|
|
||||||
CONFIG_CMD_DHCP=y
|
|
||||||
CONFIG_CMD_MII=y
|
|
||||||
CONFIG_CMD_PING=y
|
|
||||||
CONFIG_CMD_BMP=y
|
|
||||||
CONFIG_CMD_CACHE=y
|
|
||||||
# CONFIG_CMD_HASH is not set
|
|
||||||
CONFIG_CMD_EXT2=y
|
|
||||||
CONFIG_CMD_EXT4=y
|
|
||||||
CONFIG_CMD_EXT4_WRITE=y
|
|
||||||
CONFIG_CMD_FAT=y
|
|
||||||
CONFIG_CMD_FS_GENERIC=y
|
|
||||||
CONFIG_CMD_MTDPARTS=y
|
|
||||||
CONFIG_CMD_UBI=y
|
|
||||||
CONFIG_OF_CONTROL=y
|
|
||||||
CONFIG_OF_LIST="imx6dl-aristainetos2b_4 imx6dl-aristainetos2b_7"
|
|
||||||
CONFIG_DTB_RESELECT=y
|
|
||||||
CONFIG_MULTI_DTB_FIT=y
|
|
||||||
CONFIG_ENV_OVERWRITE=y
|
|
||||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
|
||||||
CONFIG_ENV_SPI_EARLY=y
|
|
||||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
|
||||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
||||||
CONFIG_VERSION_VARIABLE=y
|
|
||||||
CONFIG_BOUNCE_BUFFER=y
|
|
||||||
CONFIG_GPIO_HOG=y
|
|
||||||
CONFIG_DM_GPIO_LOOKUP_LABEL=y
|
|
||||||
CONFIG_DM_PCA953X=y
|
|
||||||
CONFIG_DM_I2C=y
|
|
||||||
CONFIG_LED=y
|
|
||||||
CONFIG_LED_GPIO=y
|
|
||||||
CONFIG_MISC=y
|
|
||||||
CONFIG_I2C_EEPROM=y
|
|
||||||
CONFIG_DM_MMC=y
|
|
||||||
CONFIG_FSL_USDHC=y
|
|
||||||
CONFIG_MTD=y
|
|
||||||
CONFIG_DM_SPI_FLASH=y
|
|
||||||
CONFIG_SF_DEFAULT_MODE=0
|
|
||||||
CONFIG_SF_DEFAULT_SPEED=20000000
|
|
||||||
CONFIG_SPI_FLASH_STMICRO=y
|
|
||||||
CONFIG_SPI_FLASH_MTD=y
|
|
||||||
CONFIG_MTD_UBI_FASTMAP=y
|
|
||||||
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
|
|
||||||
CONFIG_PHYLIB=y
|
|
||||||
CONFIG_PHY_MICREL=y
|
|
||||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
|
||||||
CONFIG_DM_ETH=y
|
|
||||||
CONFIG_MII=y
|
|
||||||
CONFIG_PHY=y
|
|
||||||
CONFIG_PINCTRL=y
|
|
||||||
CONFIG_PINCTRL_IMX6=y
|
|
||||||
CONFIG_DM_PMIC=y
|
|
||||||
CONFIG_DM_REGULATOR=y
|
|
||||||
CONFIG_DM_REGULATOR_FIXED=y
|
|
||||||
CONFIG_DM_PWM=y
|
|
||||||
CONFIG_PWM_IMX=y
|
|
||||||
CONFIG_DM_RTC=y
|
|
||||||
CONFIG_RTC_DS1307=y
|
|
||||||
CONFIG_DM_SERIAL=y
|
|
||||||
CONFIG_SPI=y
|
|
||||||
CONFIG_DM_SPI=y
|
|
||||||
CONFIG_MXC_SPI=y
|
|
||||||
CONFIG_SYSRESET=y
|
|
||||||
CONFIG_SYSRESET_WATCHDOG=y
|
|
||||||
CONFIG_USB=y
|
|
||||||
CONFIG_DM_USB=y
|
|
||||||
CONFIG_USB_STORAGE=y
|
|
||||||
CONFIG_DM_VIDEO=y
|
|
||||||
CONFIG_SYS_WHITE_ON_BLACK=y
|
|
||||||
CONFIG_DISPLAY=y
|
|
||||||
CONFIG_VIDEO_IPUV3=y
|
|
||||||
CONFIG_SPLASH_SCREEN=y
|
|
||||||
CONFIG_SPLASH_SCREEN_ALIGN=y
|
|
||||||
CONFIG_VIDEO_BMP_RLE8=y
|
|
||||||
CONFIG_BMP_16BPP=y
|
|
||||||
CONFIG_IMX_WATCHDOG=y
|
|
||||||
# CONFIG_EFI_LOADER is not set
|
|
||||||
|
|
@ -1,115 +0,0 @@
|
||||||
CONFIG_ARM=y
|
|
||||||
CONFIG_ARCH_MX6=y
|
|
||||||
CONFIG_SYS_TEXT_BASE=0x17800000
|
|
||||||
CONFIG_SYS_MALLOC_F_LEN=0xe000
|
|
||||||
CONFIG_NR_DRAM_BANKS=1
|
|
||||||
CONFIG_ENV_OFFSET=0xD0000
|
|
||||||
CONFIG_MX6DL=y
|
|
||||||
CONFIG_TARGET_ARISTAINETOS2BCSL=y
|
|
||||||
CONFIG_DM_GPIO=y
|
|
||||||
CONFIG_ENV_OFFSET_REDUND=0xE0000
|
|
||||||
CONFIG_IMX_HAB=y
|
|
||||||
# CONFIG_CMD_DEKBLOB is not set
|
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2b_csl_4"
|
|
||||||
CONFIG_FIT=y
|
|
||||||
CONFIG_SUPPORT_RAW_INITRD=y
|
|
||||||
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg"
|
|
||||||
CONFIG_BOOTDELAY=3
|
|
||||||
CONFIG_AUTOBOOT_KEYED=y
|
|
||||||
CONFIG_AUTOBOOT_ENCRYPTION=y
|
|
||||||
CONFIG_AUTOBOOT_STOP_STR_SHA256="30bb0bce5f77da71a6e8e436fe40af54bc823db9501ae170f77e9992499d88fb"
|
|
||||||
CONFIG_USE_BOOTCOMMAND=y
|
|
||||||
CONFIG_BOOTCOMMAND="run ari_boot"
|
|
||||||
# CONFIG_CONSOLE_MUX is not set
|
|
||||||
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
|
||||||
CONFIG_BOARD_TYPES=y
|
|
||||||
CONFIG_BOARD_EARLY_INIT_F=y
|
|
||||||
CONFIG_HUSH_PARSER=y
|
|
||||||
CONFIG_CMD_BOOTZ=y
|
|
||||||
# CONFIG_BOOTM_NETBSD is not set
|
|
||||||
# CONFIG_BOOTM_PLAN9 is not set
|
|
||||||
# CONFIG_BOOTM_RTEMS is not set
|
|
||||||
# CONFIG_BOOTM_VXWORKS is not set
|
|
||||||
# CONFIG_CMD_FLASH is not set
|
|
||||||
CONFIG_CMD_GPIO=y
|
|
||||||
CONFIG_CMD_I2C=y
|
|
||||||
CONFIG_CMD_MMC=y
|
|
||||||
# CONFIG_CMD_PINMUX is not set
|
|
||||||
# CONFIG_CMD_SATA is not set
|
|
||||||
CONFIG_CMD_USB=y
|
|
||||||
CONFIG_CMD_DHCP=y
|
|
||||||
CONFIG_CMD_MII=y
|
|
||||||
CONFIG_CMD_PING=y
|
|
||||||
CONFIG_CMD_BMP=y
|
|
||||||
CONFIG_CMD_CACHE=y
|
|
||||||
# CONFIG_CMD_HASH is not set
|
|
||||||
CONFIG_CMD_EXT2=y
|
|
||||||
CONFIG_CMD_EXT4=y
|
|
||||||
CONFIG_CMD_EXT4_WRITE=y
|
|
||||||
CONFIG_CMD_FAT=y
|
|
||||||
CONFIG_CMD_FS_GENERIC=y
|
|
||||||
CONFIG_CMD_MTDPARTS=y
|
|
||||||
CONFIG_CMD_UBI=y
|
|
||||||
CONFIG_OF_CONTROL=y
|
|
||||||
CONFIG_OF_LIST="imx6dl-aristainetos2b_csl_4 imx6dl-aristainetos2b_csl_7"
|
|
||||||
CONFIG_DTB_RESELECT=y
|
|
||||||
CONFIG_MULTI_DTB_FIT=y
|
|
||||||
CONFIG_ENV_OVERWRITE=y
|
|
||||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
|
||||||
CONFIG_ENV_SPI_EARLY=y
|
|
||||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
|
||||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
||||||
CONFIG_VERSION_VARIABLE=y
|
|
||||||
CONFIG_BOUNCE_BUFFER=y
|
|
||||||
CONFIG_GPIO_HOG=y
|
|
||||||
CONFIG_DM_GPIO_LOOKUP_LABEL=y
|
|
||||||
CONFIG_DM_PCA953X=y
|
|
||||||
CONFIG_DM_I2C=y
|
|
||||||
CONFIG_LED=y
|
|
||||||
CONFIG_LED_GPIO=y
|
|
||||||
CONFIG_MISC=y
|
|
||||||
CONFIG_I2C_EEPROM=y
|
|
||||||
CONFIG_DM_MMC=y
|
|
||||||
CONFIG_FSL_USDHC=y
|
|
||||||
CONFIG_MTD=y
|
|
||||||
CONFIG_DM_SPI_FLASH=y
|
|
||||||
CONFIG_SF_DEFAULT_MODE=0
|
|
||||||
CONFIG_SF_DEFAULT_SPEED=20000000
|
|
||||||
CONFIG_SPI_FLASH_STMICRO=y
|
|
||||||
CONFIG_SPI_FLASH_MTD=y
|
|
||||||
CONFIG_MTD_UBI_FASTMAP=y
|
|
||||||
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
|
|
||||||
CONFIG_PHYLIB=y
|
|
||||||
CONFIG_PHY_MICREL=y
|
|
||||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
|
||||||
CONFIG_DM_ETH=y
|
|
||||||
CONFIG_MII=y
|
|
||||||
CONFIG_PHY=y
|
|
||||||
CONFIG_PINCTRL=y
|
|
||||||
CONFIG_PINCTRL_IMX6=y
|
|
||||||
CONFIG_DM_PMIC=y
|
|
||||||
CONFIG_DM_REGULATOR=y
|
|
||||||
CONFIG_DM_REGULATOR_FIXED=y
|
|
||||||
CONFIG_DM_PWM=y
|
|
||||||
CONFIG_PWM_IMX=y
|
|
||||||
CONFIG_DM_RTC=y
|
|
||||||
CONFIG_RTC_DS1307=y
|
|
||||||
CONFIG_DM_SERIAL=y
|
|
||||||
CONFIG_SPI=y
|
|
||||||
CONFIG_DM_SPI=y
|
|
||||||
CONFIG_MXC_SPI=y
|
|
||||||
CONFIG_SYSRESET=y
|
|
||||||
CONFIG_SYSRESET_WATCHDOG=y
|
|
||||||
CONFIG_USB=y
|
|
||||||
CONFIG_DM_USB=y
|
|
||||||
CONFIG_USB_STORAGE=y
|
|
||||||
CONFIG_DM_VIDEO=y
|
|
||||||
CONFIG_SYS_WHITE_ON_BLACK=y
|
|
||||||
CONFIG_DISPLAY=y
|
|
||||||
CONFIG_VIDEO_IPUV3=y
|
|
||||||
CONFIG_SPLASH_SCREEN=y
|
|
||||||
CONFIG_SPLASH_SCREEN_ALIGN=y
|
|
||||||
CONFIG_VIDEO_BMP_RLE8=y
|
|
||||||
CONFIG_BMP_16BPP=y
|
|
||||||
CONFIG_IMX_WATCHDOG=y
|
|
||||||
# CONFIG_EFI_LOADER is not set
|
|
||||||
|
|
@ -10,11 +10,10 @@ CONFIG_DM_GPIO=y
|
||||||
CONFIG_ENV_OFFSET_REDUND=0xE0000
|
CONFIG_ENV_OFFSET_REDUND=0xE0000
|
||||||
CONFIG_IMX_HAB=y
|
CONFIG_IMX_HAB=y
|
||||||
# CONFIG_CMD_DEKBLOB is not set
|
# CONFIG_CMD_DEKBLOB is not set
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2c_4"
|
|
||||||
CONFIG_FIT=y
|
CONFIG_FIT=y
|
||||||
CONFIG_SUPPORT_RAW_INITRD=y
|
CONFIG_SUPPORT_RAW_INITRD=y
|
||||||
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg"
|
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg"
|
||||||
CONFIG_BOOTDELAY=3
|
CONFIG_BOOTDELAY=-2
|
||||||
CONFIG_AUTOBOOT_KEYED=y
|
CONFIG_AUTOBOOT_KEYED=y
|
||||||
CONFIG_AUTOBOOT_ENCRYPTION=y
|
CONFIG_AUTOBOOT_ENCRYPTION=y
|
||||||
CONFIG_AUTOBOOT_STOP_STR_SHA256="30bb0bce5f77da71a6e8e436fe40af54bc823db9501ae170f77e9992499d88fb"
|
CONFIG_AUTOBOOT_STOP_STR_SHA256="30bb0bce5f77da71a6e8e436fe40af54bc823db9501ae170f77e9992499d88fb"
|
||||||
|
|
@ -51,7 +50,8 @@ CONFIG_CMD_FS_GENERIC=y
|
||||||
CONFIG_CMD_MTDPARTS=y
|
CONFIG_CMD_MTDPARTS=y
|
||||||
CONFIG_CMD_UBI=y
|
CONFIG_CMD_UBI=y
|
||||||
CONFIG_OF_CONTROL=y
|
CONFIG_OF_CONTROL=y
|
||||||
CONFIG_OF_LIST="imx6dl-aristainetos2c_4 imx6dl-aristainetos2c_7"
|
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2c_7"
|
||||||
|
CONFIG_OF_LIST="imx6dl-aristainetos2c_7"
|
||||||
CONFIG_DTB_RESELECT=y
|
CONFIG_DTB_RESELECT=y
|
||||||
CONFIG_MULTI_DTB_FIT=y
|
CONFIG_MULTI_DTB_FIT=y
|
||||||
CONFIG_ENV_OVERWRITE=y
|
CONFIG_ENV_OVERWRITE=y
|
||||||
|
|
|
||||||
|
|
@ -13,14 +13,15 @@
|
||||||
|
|
||||||
#define CONFIG_HOSTNAME "aristainetos2"
|
#define CONFIG_HOSTNAME "aristainetos2"
|
||||||
|
|
||||||
|
#if (CONFIG_SYS_BOARD_VERSION == 5)
|
||||||
#define CONFIG_MXC_UART_BASE UART2_BASE
|
#define CONFIG_MXC_UART_BASE UART2_BASE
|
||||||
#define CONSOLE_DEV "ttymxc1"
|
#define CONSOLE_DEV "ttymxc1"
|
||||||
|
#endif
|
||||||
|
|
||||||
#define CONFIG_FEC_XCV_TYPE RGMII
|
#define CONFIG_FEC_XCV_TYPE RGMII
|
||||||
|
|
||||||
/* Framebuffer */
|
/* Framebuffer */
|
||||||
#define CONFIG_SYS_LDB_CLOCK 28341000
|
#define CONFIG_SYS_LDB_CLOCK 28341000
|
||||||
#define CONFIG_LG4573
|
|
||||||
|
|
||||||
#include "mx6_common.h"
|
#include "mx6_common.h"
|
||||||
|
|
||||||
|
|
@ -77,6 +78,8 @@
|
||||||
"enable_hab_check=1\0"
|
"enable_hab_check=1\0"
|
||||||
#else
|
#else
|
||||||
#define HAB_EXTRA_SETTINGS \
|
#define HAB_EXTRA_SETTINGS \
|
||||||
|
"hab_check_addr=echo HAB check addr always returns " \
|
||||||
|
"true;true\0" \
|
||||||
"hab_check_file_fit=echo HAB check FIT file always returns " \
|
"hab_check_file_fit=echo HAB check FIT file always returns " \
|
||||||
"true;true\0" \
|
"true;true\0" \
|
||||||
"hab_check_flash_fit=echo HAB check flash FIT always returns " \
|
"hab_check_flash_fit=echo HAB check flash FIT always returns " \
|
||||||
|
|
@ -86,96 +89,12 @@
|
||||||
"enable_hab_check=0\0"
|
"enable_hab_check=0\0"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if (CONFIG_SYS_BOARD_VERSION == 3)
|
#if (CONFIG_SYS_BOARD_VERSION == 5)
|
||||||
#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
|
#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
|
||||||
"dead=led led_red on\0" \
|
"dead=while true; do; " \
|
||||||
"mtdids=nand0=gpmi-nand,nor0=spi0.0\0" \
|
"led led_red on; sleep 1;" \
|
||||||
"mtdparts=mtdparts=spi0.0:832k(u-boot),64k(env),64k(env-red)," \
|
"led led_red off; sleep 1;" \
|
||||||
"-(ubi-nor);gpmi-nand:-(ubi)\0" \
|
"done\0"
|
||||||
"addmisc=setenv bootargs ${bootargs} net.ifnames=0 consoleblank=0 " \
|
|
||||||
"bootmode=${bootmode} mmcpart=${mmcpart}\0" \
|
|
||||||
"mainboot=echo Booting from SD-card ...; " \
|
|
||||||
"run mainargs addmtd addmisc;" \
|
|
||||||
"if test -n ${addmiscM}; then run addmiscM;fi;" \
|
|
||||||
"if test -n ${addmiscC}; then run addmiscC;fi;" \
|
|
||||||
"if test -n ${addmiscD}; then run addmiscD;fi;" \
|
|
||||||
"run boot_board_type;" \
|
|
||||||
"bootm ${fit_addr_r}\0" \
|
|
||||||
"mainargs=setenv bootargs console=${console},${baudrate} " \
|
|
||||||
"root=${mmcroot}\0" \
|
|
||||||
"main_load_fit=ext4load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
|
|
||||||
"${fit_file}\0" \
|
|
||||||
"rescue_load_fit=ext4load mmc ${mmcdev}:${mmcrescuepart} " \
|
|
||||||
"${fit_addr_r} ${rescue_fit_file}\0"
|
|
||||||
#elif (CONFIG_SYS_BOARD_VERSION == 4)
|
|
||||||
#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
|
|
||||||
"dead=led led_red on;led led_red2 on;\0" \
|
|
||||||
"mtdids=nand0=gpmi-nand,nor0=spi0.0\0" \
|
|
||||||
"mtdparts=mtdparts=spi0.0:832k(u-boot),64k(env),64k(env-red)," \
|
|
||||||
"-(ubi-nor);gpmi-nand:-(ubi)\0" \
|
|
||||||
"addmisc=setenv bootargs ${bootargs} net.ifnames=0 consoleblank=0 " \
|
|
||||||
"bootmode=${bootmode} mmcpart=${mmcpart}\0" \
|
|
||||||
"mainboot=echo Booting from SD-card ...; " \
|
|
||||||
"run mainargs addmtd addmisc;" \
|
|
||||||
"if test -n ${addmiscM}; then run addmiscM;fi;" \
|
|
||||||
"if test -n ${addmiscC}; then run addmiscC;fi;" \
|
|
||||||
"if test -n ${addmiscD}; then run addmiscD;fi;" \
|
|
||||||
"run boot_board_type;" \
|
|
||||||
"bootm ${fit_addr_r}\0" \
|
|
||||||
"mainargs=setenv bootargs console=${console},${baudrate} " \
|
|
||||||
"root=${mmcroot}\0" \
|
|
||||||
"main_load_fit=ext4load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
|
|
||||||
"${fit_file}\0" \
|
|
||||||
"rescue_load_fit=ext4load mmc ${mmcdev}:${mmcrescuepart} " \
|
|
||||||
"${fit_addr_r} ${rescue_fit_file}\0"
|
|
||||||
#elif (CONFIG_SYS_BOARD_VERSION == 5)
|
|
||||||
#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
|
|
||||||
"emmcpart=1\0" \
|
|
||||||
"emmc_rescue_part=3\0" \
|
|
||||||
"emmcdev=1\0" \
|
|
||||||
"emmcroot=/dev/mmcblk1p1 rootwait rw\0" \
|
|
||||||
"dead=led led_red on\0" \
|
|
||||||
"mtdids=nor0=spi0.0\0" \
|
|
||||||
"mtdparts=mtdparts=spi0.0:832k(u-boot),64k(env),64k(env-red)," \
|
|
||||||
"-(ubi-nor)\0" \
|
|
||||||
"addmisc=setenv bootargs ${bootargs} net.ifnames=0 consoleblank=0 " \
|
|
||||||
"bootmode=${bootmode} mmcpart=${mmcpart} " \
|
|
||||||
"emmcpart=${emmcpart}\0" \
|
|
||||||
"mainboot=echo Booting from eMMC ...; " \
|
|
||||||
"run mainargs addmtd addmisc;" \
|
|
||||||
"if test -n ${addmiscM}; then run addmiscM;fi;" \
|
|
||||||
"if test -n ${addmiscC}; then run addmiscC;fi;" \
|
|
||||||
"if test -n ${addmiscD}; then run addmiscD;fi;" \
|
|
||||||
"run boot_board_type;" \
|
|
||||||
"bootm ${fit_addr_r}\0" \
|
|
||||||
"mainargs=setenv bootargs console=${console},${baudrate} " \
|
|
||||||
"root=${emmcroot} rootfstype=ext4\0 " \
|
|
||||||
"main_load_fit=ext4load mmc ${emmcdev}:${emmcpart} ${fit_addr_r} " \
|
|
||||||
"${fit_file}; " \
|
|
||||||
"imi ${fit_addr_r}\0 " \
|
|
||||||
"rescue_load_fit=ext4load mmc ${emmcdev}:${emmc_rescue_part} " \
|
|
||||||
"${fit_addr_r} ${rescue_fit_file};imi ${fit_addr_r}\0"
|
|
||||||
#else
|
|
||||||
#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
|
|
||||||
"dead=led led_red on\0" \
|
|
||||||
"mtdids=nand0=gpmi-nand,nor0=spi3.1\0" \
|
|
||||||
"mtdparts=mtdparts=spi3.1:832k(u-boot),64k(env),64k(env-red)," \
|
|
||||||
"-(ubi-nor);gpmi-nand:-(ubi)\0" \
|
|
||||||
"addmisc=setenv bootargs ${bootargs} net.ifnames=0 consoleblank=0 " \
|
|
||||||
"bootmode=${bootmode} mmcpart=${mmcpart}\0" \
|
|
||||||
"mainboot=echo Booting from SD-card ...; " \
|
|
||||||
"run mainargs addmtd addmisc;" \
|
|
||||||
"if test -n ${addmiscM}; then run addmiscM;fi;" \
|
|
||||||
"if test -n ${addmiscC}; then run addmiscC;fi;" \
|
|
||||||
"if test -n ${addmiscD}; then run addmiscD;fi;" \
|
|
||||||
"run boot_board_type;" \
|
|
||||||
"bootm ${fit_addr_r}\0" \
|
|
||||||
"mainargs=setenv bootargs console=${console},${baudrate} " \
|
|
||||||
"root=${mmcroot}\0" \
|
|
||||||
"main_load_fit=ext4load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
|
|
||||||
"${fit_file}\0" \
|
|
||||||
"rescue_load_fit=ext4load mmc ${mmcdev}:${mmcrescuepart} " \
|
|
||||||
"${fit_addr_r} ${rescue_fit_file}\0"
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||||
|
|
@ -183,17 +102,24 @@
|
||||||
"usb_pgood_delay=2000\0" \
|
"usb_pgood_delay=2000\0" \
|
||||||
"nor_bootdelay=-2\0" \
|
"nor_bootdelay=-2\0" \
|
||||||
"script=u-boot.scr\0" \
|
"script=u-boot.scr\0" \
|
||||||
"fit_file=/boot/system.itb\0" \
|
|
||||||
"rescue_fit_file=/boot/rescue.itb\0" \
|
|
||||||
"loadaddr=0x12000000\0" \
|
"loadaddr=0x12000000\0" \
|
||||||
"fit_addr_r=0x14000000\0" \
|
"fit_addr_r=0x14000000\0" \
|
||||||
"uboot=/boot/u-boot.imx\0" \
|
|
||||||
"uboot_sz=d0000\0" \
|
"uboot_sz=d0000\0" \
|
||||||
"panel=lb07wv8\0" \
|
"panel=lb07wv8\0" \
|
||||||
"splashpos=m,m\0" \
|
"splashpos=m,m\0" \
|
||||||
"console=" CONSOLE_DEV "\0" \
|
"console=" CONSOLE_DEV "\0" \
|
||||||
"fdt_high=0xffffffff\0" \
|
"emmcroot=/dev/mmcblk1p1 rootwait rw\0" \
|
||||||
"initrd_high=0xffffffff\0" \
|
"mtdids=nor0=spi0.0\0" \
|
||||||
|
"mtdparts=mtdparts=spi0.0:832k(u-boot),64k(env),64k(env-red)," \
|
||||||
|
"-(ubi-nor)\0" \
|
||||||
|
"mk_fitfile_path=setenv fit_file /${sysnum}/system.itb\0" \
|
||||||
|
"mk_rescue_fitfile_path=setenv rescue_fit_file /${rescue_sysnum}/system.itb\0" \
|
||||||
|
"mk_uboot_path=setenv uboot /${sysnum}/u-boot.imx\0" \
|
||||||
|
"mk_pubkey_path=setenv pubkey /${sysnum}/PCR.pem\0" \
|
||||||
|
"mk_rescue_pubkey_path=setenv pubkey /${rescue_sysnum}/PCR.pem\0" \
|
||||||
|
"addmisc=setenv bootargs ${bootargs} net.ifnames=0 consoleblank=0 " \
|
||||||
|
"bootmode=${bootmode} rng_core.default_quality=1000 " \
|
||||||
|
"mmcpart=${mmcpart} emmcpart=${emmcpart} sysnum=${sysnum}\0" \
|
||||||
"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
|
"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
|
||||||
"boot_board_type=bootm ${fit_addr_r}#${board_type}\0" \
|
"boot_board_type=bootm ${fit_addr_r}#${board_type}\0" \
|
||||||
"get_env=mw ${loadaddr} 0 0x20000;" \
|
"get_env=mw ${loadaddr} 0 0x20000;" \
|
||||||
|
|
@ -205,7 +131,7 @@
|
||||||
"sf protect unlock 0 0x1000000;" \
|
"sf protect unlock 0 0x1000000;" \
|
||||||
"mw ${loadaddr} 0 0x20000;" \
|
"mw ${loadaddr} 0 0x20000;" \
|
||||||
"env export -t ${loadaddr} serial# ethaddr " \
|
"env export -t ${loadaddr} serial# ethaddr " \
|
||||||
"board_type panel addmisc addmiscM addmiscC addmiscD;" \
|
"board_type panel;" \
|
||||||
"env default -a;" \
|
"env default -a;" \
|
||||||
"env import -t ${loadaddr}\0" \
|
"env import -t ${loadaddr}\0" \
|
||||||
"loadbootscript=" \
|
"loadbootscript=" \
|
||||||
|
|
@ -216,28 +142,62 @@
|
||||||
"loadbootscriptUSBf=" \
|
"loadbootscriptUSBf=" \
|
||||||
"fatload usb 0 ${loadaddr} ${script};\0" \
|
"fatload usb 0 ${loadaddr} ${script};\0" \
|
||||||
"bootscriptUSB=echo Running bootscript from usb-stick ...; " \
|
"bootscriptUSB=echo Running bootscript from usb-stick ...; " \
|
||||||
"source\0" \
|
"source \0" \
|
||||||
"bootscript=echo Running bootscript from mmc ...; " \
|
"bootscript=echo Running bootscript from mmc ...; " \
|
||||||
"source\0" \
|
"source \0" \
|
||||||
"mmcpart=1\0" \
|
"mmcpart=1\0" \
|
||||||
"mmcrescuepart=3\0" \
|
|
||||||
"mmcdev=0\0" \
|
"mmcdev=0\0" \
|
||||||
|
"emmcpart=1\0" \
|
||||||
|
"emmcdev=1\0" \
|
||||||
|
"sysnum=1\0" \
|
||||||
|
"rescue_sysnum=0\0" \
|
||||||
|
"rreason=18\0" \
|
||||||
|
"mainboot=echo Booting from eMMC ...; " \
|
||||||
|
"run mainargs addmtd addmisc;" \
|
||||||
|
"run boot_board_type;" \
|
||||||
|
"bootm ${fit_addr_r}\0" \
|
||||||
|
"mainargs=setenv bootargs console=${console},${baudrate} " \
|
||||||
|
"root=${emmcroot} rootfstype=ext4\0 " \
|
||||||
|
"main_load_fit=run mk_fitfile_path; " \
|
||||||
|
"ext4load mmc ${emmcdev}:${emmcpart} ${fit_addr_r} " \
|
||||||
|
"${fit_file}; " \
|
||||||
|
"imi ${fit_addr_r}\0 " \
|
||||||
|
"rescue_load_fit=run mk_rescue_fitfile_path; " \
|
||||||
|
"ext4load mmc ${emmcdev}:${emmcpart} ${fit_addr_r} " \
|
||||||
|
"${rescue_fit_file}; " \
|
||||||
|
"imi ${fit_addr_r}\0" \
|
||||||
|
"main_load_pubkey=run mk_pubkey_path; " \
|
||||||
|
"setenv hab_check_filetype \"PCR.pem\";" \
|
||||||
|
"env set check_addr ${loadaddr};" \
|
||||||
|
"ext4load mmc ${emmcdev}:${emmcpart} ${loadaddr} " \
|
||||||
|
"${pubkey}\0" \
|
||||||
|
"rescue_load_pubkey=run mk_rescue_pubkey_path; " \
|
||||||
|
"setenv hab_check_filetype \"PCR.pem\";" \
|
||||||
|
"env set check_addr ${loadaddr};" \
|
||||||
|
"ext4load mmc ${emmcdev}:${emmcpart} ${loadaddr} " \
|
||||||
|
"${pubkey}\0" \
|
||||||
|
"mainRargs=setenv bootargs console=${console},${baudrate} " \
|
||||||
|
"rescue_sysnum=${rescue_sysnum} root=${emmcroot} rootfstype=ext4\0" \
|
||||||
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
|
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
|
||||||
"mmcargs=setenv bootargs console=${console},${baudrate} " \
|
"mmcargs=setenv bootargs console=${console},${baudrate} " \
|
||||||
"root=${mmcroot}\0" \
|
"root=${mmcroot}\0" \
|
||||||
|
"mmcRargs=setenv bootargs console=${console},${baudrate} " \
|
||||||
|
"rescue_sysnum=${rescue_sysnum} root=${mmcroot}\0" \
|
||||||
"mmcboot=echo Booting from mmc ...; " \
|
"mmcboot=echo Booting from mmc ...; " \
|
||||||
"run mmcargs addmtd addmisc;" \
|
"run mmcargs addmtd addmisc;" \
|
||||||
"if test -n ${addmiscM}; then run addmiscM;fi;" \
|
|
||||||
"if test -n ${addmiscC}; then run addmiscC;fi;" \
|
|
||||||
"if test -n ${addmiscD}; then run addmiscD;fi;" \
|
|
||||||
"run boot_board_type;" \
|
"run boot_board_type;" \
|
||||||
"bootm ${fit_addr_r}\0" \
|
"bootm ${fit_addr_r}\0" \
|
||||||
"mmc_load_fit=ext4load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
|
"mmc_load_fit=run mk_fitfile_path; " \
|
||||||
|
"ext4load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
|
||||||
"${fit_file}\0" \
|
"${fit_file}\0" \
|
||||||
"mmc_load_uboot=ext4load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
|
"imi ${fit_addr_r}\0" \
|
||||||
"${uboot}\0" \
|
"mmc_rescue_load_fit=run mk_rescue_fitfile_path; " \
|
||||||
"mmc_rescue_load_fit=ext4load mmc ${mmcdev}:${mmcrescuepart} " \
|
"ext4load mmc ${mmcdev}:${mmcpart} " \
|
||||||
"${fit_addr_r} ${rescue_fit_file}\0" \
|
"${fit_addr_r} ${rescue_fit_file}\0" \
|
||||||
|
"imi ${fit_addr_r}\0" \
|
||||||
|
"mmc_load_uboot=run mk_uboot_path; " \
|
||||||
|
"ext4load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
|
||||||
|
"${uboot}\0" \
|
||||||
"mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
|
"mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
|
||||||
"setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
|
"setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
|
||||||
"setexpr uboot_maxsize ${uboot_sz} - 400;" \
|
"setexpr uboot_maxsize ${uboot_sz} - 400;" \
|
||||||
|
|
@ -246,14 +206,19 @@
|
||||||
"sf write ${loadaddr} 400 ${filesize};" \
|
"sf write ${loadaddr} 400 ${filesize};" \
|
||||||
"sf read ${cmp_buf} 400 ${uboot_sz};" \
|
"sf read ${cmp_buf} 400 ${uboot_sz};" \
|
||||||
"cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
|
"cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
|
||||||
"rescueargs=setenv bootargs console=${console},${baudrate} " \
|
"mmc_load_pubkey=run mk_pubkey_path; " \
|
||||||
"root=/dev/ram rw\0 " \
|
"setenv hab_check_filetype \"PCR.pem\";" \
|
||||||
|
"env set check_addr ${loadaddr};" \
|
||||||
|
"ext4load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
|
||||||
|
"${pubkey}\0" \
|
||||||
|
"mmc_rescue_load_pubkey=run mk_rescue_pubkey_path; " \
|
||||||
|
"setenv hab_check_filetype \"PCR.pem\";" \
|
||||||
|
"env set check_addr ${loadaddr};" \
|
||||||
|
"ext4load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
|
||||||
|
"${pubkey}\0" \
|
||||||
"rescueboot=echo Booting rescue system ...; " \
|
"rescueboot=echo Booting rescue system ...; " \
|
||||||
"run rescueargs addmtd addmisc;" \
|
"run addmtd addmisc;" \
|
||||||
"if test -n ${rescue_reason}; then run rescue_reason;fi;" \
|
"if test -n ${rescue_reason}; then run rescue_reason;fi;" \
|
||||||
"if test -n ${addmiscM}; then run addmiscM;fi;" \
|
|
||||||
"if test -n ${addmiscC}; then run addmiscC;fi;" \
|
|
||||||
"if test -n ${addmiscD}; then run addmiscD;fi;" \
|
|
||||||
"run boot_board_type;" \
|
"run boot_board_type;" \
|
||||||
"if bootm ${fit_addr_r}; then ; " \
|
"if bootm ${fit_addr_r}; then ; " \
|
||||||
"else " \
|
"else " \
|
||||||
|
|
@ -261,50 +226,73 @@
|
||||||
"fi; \0" \
|
"fi; \0" \
|
||||||
"r_reason_syserr=setenv rescue_reason setenv bootargs " \
|
"r_reason_syserr=setenv rescue_reason setenv bootargs " \
|
||||||
"\\\\${bootargs} " \
|
"\\\\${bootargs} " \
|
||||||
"rescueReason=18\0 " \
|
"rescueReason=$rreason\0 " \
|
||||||
"usb_load_fit=ext4load usb 0 ${fit_addr_r} ${fit_file}\0" \
|
"usb_load_fit=run mk_fitfile_path; " \
|
||||||
"usb_load_fitf=fatload usb 0 ${fit_addr_r} ${fit_file}\0" \
|
"ext4load usb 0 ${fit_addr_r} ${fit_file}\0" \
|
||||||
"usb_load_rescuefit=ext4load usb 0 ${fit_addr_r} " \
|
"usb_load_fitf=run mk_fitfile_path; " \
|
||||||
|
"fatload usb 0 ${fit_addr_r} ${fit_file}\0" \
|
||||||
|
"usb_load_rescuefit=run mk_rescue_fitfile_path; " \
|
||||||
|
"ext4load usb 0 ${fit_addr_r} " \
|
||||||
"${rescue_fit_file}\0" \
|
"${rescue_fit_file}\0" \
|
||||||
"usb_load_rescuefitf=fatload usb 0 ${fit_addr_r} " \
|
"usb_load_rescuefitf=run mk_rescue_fitfile_path; " \
|
||||||
|
"fatload usb 0 ${fit_addr_r} " \
|
||||||
"${rescue_fit_file}\0" \
|
"${rescue_fit_file}\0" \
|
||||||
|
"usb_load_pubkey=run mk_pubkey_path; " \
|
||||||
|
"setenv hab_check_filetype \"PCR.pem\";" \
|
||||||
|
"env set check_addr ${loadaddr};" \
|
||||||
|
"ext4load usb 0 ${loadaddr} ${pubkey}\0" \
|
||||||
|
"usb_rescue_load_pubkey=run mk_rescue_pubkey_path; " \
|
||||||
|
"setenv hab_check_filetype \"PCR.pem\";" \
|
||||||
|
"env set check_addr ${loadaddr};" \
|
||||||
|
"ext4load usb 0 ${loadaddr} ${pubkey}\0" \
|
||||||
|
"usb_load_pubkeyf=run mk_pubkey_path; " \
|
||||||
|
"setenv hab_check_filetype \"PCR.pem\";" \
|
||||||
|
"env set check_addr ${loadaddr};" \
|
||||||
|
"fatload usb 0 ${loadaddr} ${pubkey}\0" \
|
||||||
|
"usb_rescue_load_pubkeyf=run mk_rescue_pubkey_path; " \
|
||||||
|
"setenv hab_check_filetype \"PCR.pem\";" \
|
||||||
|
"env set check_addr ${loadaddr};" \
|
||||||
|
"fatload usb 0 ${loadaddr} ${pubkey}\0" \
|
||||||
"usbroot=/dev/sda1 rootwait rw\0" \
|
"usbroot=/dev/sda1 rootwait rw\0" \
|
||||||
"usbboot=echo Booting from usb-stick ...; " \
|
"usbboot=echo Booting from usb-stick ...; " \
|
||||||
"run usbargs addmtd addmisc;" \
|
"run usbargs addmtd addmisc;" \
|
||||||
"if test -n ${addmiscM}; then run addmiscM;fi;" \
|
|
||||||
"if test -n ${addmiscC}; then run addmiscC;fi;" \
|
|
||||||
"if test -n ${addmiscD}; then run addmiscD;fi;" \
|
|
||||||
"run boot_board_type;" \
|
"run boot_board_type;" \
|
||||||
"bootm ${fit_addr_r}\0" \
|
"bootm ${fit_addr_r}\0" \
|
||||||
"usbargs=setenv bootargs console=${console},${baudrate} " \
|
"usbargs=setenv bootargs console=${console},${baudrate} " \
|
||||||
"root=${usbroot}\0" \
|
"root=${usbroot}\0" \
|
||||||
|
"usbRargs=setenv bootargs console=${console},${baudrate} " \
|
||||||
|
"rescue_sysnum=${rescue_sysnum} root=${usbroot} rw\0 " \
|
||||||
"mmc_rescue_boot=" \
|
"mmc_rescue_boot=" \
|
||||||
"run r_reason_syserr;" \
|
"run r_reason_syserr;" \
|
||||||
"if run mmc_rescue_load_fit hab_check_file_fit; then " \
|
"if run mmc_rescue_load_pubkey hab_check_addr " \
|
||||||
"run rescueboot; " \
|
"mmc_rescue_load_fit hab_check_file_fit; then " \
|
||||||
|
"run mmcRargs; run rescueboot; " \
|
||||||
"else " \
|
"else " \
|
||||||
"run dead; " \
|
|
||||||
"echo RESCUE SYSTEM FROM SD-CARD BOOT FAILURE;" \
|
"echo RESCUE SYSTEM FROM SD-CARD BOOT FAILURE;" \
|
||||||
|
"run dead; " \
|
||||||
"fi;\0" \
|
"fi;\0" \
|
||||||
"main_rescue_boot=" \
|
"main_rescue_boot=" \
|
||||||
"if run main_load_fit hab_check_flash_fit; then " \
|
"if run main_load_pubkey hab_check_addr " \
|
||||||
|
"main_load_fit hab_check_flash_fit; then " \
|
||||||
"if run mainboot; then ; " \
|
"if run mainboot; then ; " \
|
||||||
"else " \
|
"else " \
|
||||||
"run r_reason_syserr;" \
|
"run r_reason_syserr;" \
|
||||||
"if run rescue_load_fit hab_check_file_fit;" \
|
"if run rescue_load_pubkey hab_check_addr " \
|
||||||
"then run rescueboot; " \
|
"rescue_load_fit hab_check_file_fit; then " \
|
||||||
|
"run mainRargs; run rescueboot; " \
|
||||||
"else " \
|
"else " \
|
||||||
"run dead; " \
|
|
||||||
"echo RESCUE SYSTEM BOOT FAILURE;" \
|
"echo RESCUE SYSTEM BOOT FAILURE;" \
|
||||||
|
"run dead; " \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"else " \
|
"else " \
|
||||||
"run r_reason_syserr;" \
|
"run r_reason_syserr;" \
|
||||||
"if run rescue_load_fit hab_check_file_fit; then " \
|
"if run rescue_load_pubkey hab_check_addr " \
|
||||||
"run rescueboot; " \
|
"rescue_load_fit hab_check_file_fit; then " \
|
||||||
|
"run mainRargs; run rescueboot; " \
|
||||||
"else " \
|
"else " \
|
||||||
"run dead; " \
|
|
||||||
"echo RESCUE SYSTEM BOOT FAILURE;" \
|
"echo RESCUE SYSTEM BOOT FAILURE;" \
|
||||||
|
"run dead; " \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"fi;\0" \
|
"fi;\0" \
|
||||||
"usb_mmc_rescue_boot=" \
|
"usb_mmc_rescue_boot=" \
|
||||||
|
|
@ -318,17 +306,21 @@
|
||||||
"hab_check_file_bootscript;" \
|
"hab_check_file_bootscript;" \
|
||||||
"then run bootscriptUSB; " \
|
"then run bootscriptUSB; " \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"if run usb_load_fit hab_check_file_fit; then " \
|
"if run usb_load_pubkey hab_check_addr " \
|
||||||
|
"usb_load_fit hab_check_file_fit; then " \
|
||||||
"run usbboot; " \
|
"run usbboot; " \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"if run usb_load_fitf hab_check_file_fit; then " \
|
"if run usb_load_pubkeyf hab_check_addr " \
|
||||||
|
"usb_load_fitf hab_check_file_fit; then " \
|
||||||
"run usbboot; " \
|
"run usbboot; " \
|
||||||
"fi; "\
|
"fi; "\
|
||||||
"if run usb_load_rescuefit hab_check_file_fit;" \
|
"if run usb_rescue_load_pubkey hab_check_addr " \
|
||||||
"then run r_reason_syserr rescueboot;" \
|
"usb_load_rescuefit hab_check_file_fit; then " \
|
||||||
|
"run r_reason_syserr usbRargs; run rescueboot;" \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"if run usb_load_rescuefitf hab_check_file_fit;" \
|
"if run usb_rescue_load_pubkeyf hab_check_addr " \
|
||||||
"then run r_reason_syserr rescueboot;" \
|
"usb_load_rescuefitf hab_check_file_fit; then " \
|
||||||
|
"run r_reason_syserr usbRargs; run rescueboot;" \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"run mmc_rescue_boot;" \
|
"run mmc_rescue_boot;" \
|
||||||
"fi; "\
|
"fi; "\
|
||||||
|
|
@ -338,48 +330,57 @@
|
||||||
"if test ${bootmode} -ne 0 ; then " \
|
"if test ${bootmode} -ne 0 ; then " \
|
||||||
"mmc dev ${mmcdev};" \
|
"mmc dev ${mmcdev};" \
|
||||||
"if mmc rescan; then " \
|
"if mmc rescan; then " \
|
||||||
"if run mmc_rescue_load_fit " \
|
"if run mmc_rescue_load_pubkey " \
|
||||||
"hab_check_file_fit; then " \
|
"hab_check_addr " \
|
||||||
"run rescueboot; " \
|
"mmc_rescue_load_fit " \
|
||||||
|
"hab_check_file_fit; then " \
|
||||||
|
"run mmcRargs; run rescueboot; " \
|
||||||
"else " \
|
"else " \
|
||||||
"usb start;" \
|
"usb start;" \
|
||||||
"if usb storage; then " \
|
"if usb storage; then " \
|
||||||
"if run usb_load_rescuefit " \
|
"if run usb_rescue_load_pubkey " \
|
||||||
"hab_check_file_fit;"\
|
"hab_check_addr " \
|
||||||
"then " \
|
"usb_load_rescuefit " \
|
||||||
"run rescueboot;" \
|
"hab_check_file_fit; then " \
|
||||||
|
"run usbRargs; run rescueboot;" \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"if run usb_load_rescuefitf "\
|
"if run usb_rescue_load_pubkeyf " \
|
||||||
"hab_check_file_fit;"\
|
"hab_check_addr " \
|
||||||
"then " \
|
"usb_load_rescuefitf " \
|
||||||
"run rescueboot;" \
|
"hab_check_file_fit; then " \
|
||||||
|
"run usbRargs; run rescueboot;" \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"fi;" \
|
"fi;" \
|
||||||
"fi;" \
|
"fi;" \
|
||||||
"run dead; " \
|
|
||||||
"echo RESCUE SYSTEM ON SD OR " \
|
"echo RESCUE SYSTEM ON SD OR " \
|
||||||
"USB BOOT FAILURE;" \
|
"USB BOOT FAILURE;" \
|
||||||
|
"run dead; " \
|
||||||
"else " \
|
"else " \
|
||||||
"usb start;" \
|
"usb start;" \
|
||||||
"if usb storage; then " \
|
"if usb storage; then " \
|
||||||
"if run usb_load_rescuefit " \
|
"if run usb_rescue_load_pubkey " \
|
||||||
"hab_check_file_fit; then " \
|
"hab_check_addr " \
|
||||||
"run rescueboot;" \
|
"usb_load_rescuefit " \
|
||||||
|
"hab_check_file_fit; then " \
|
||||||
|
"run usbRargs; run rescueboot;" \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"if run usb_load_rescuefitf " \
|
"if run usb_rescue_load_pubkeyf " \
|
||||||
"hab_check_file_fit; then " \
|
"hab_check_addr " \
|
||||||
"run rescueboot;" \
|
"usb_load_rescuefitf " \
|
||||||
|
"hab_check_file_fit; then " \
|
||||||
|
"run usbRargs; run rescueboot;" \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"fi;" \
|
"fi;" \
|
||||||
"run dead; " \
|
|
||||||
"echo RESCUE SYSTEM ON USB BOOT FAILURE;" \
|
"echo RESCUE SYSTEM ON USB BOOT FAILURE;" \
|
||||||
|
"run dead; " \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"else "\
|
"else "\
|
||||||
"if run rescue_load_fit hab_check_file_fit; then " \
|
"if run rescue_load_pubkey hab_check_addr " \
|
||||||
"run rescueboot; " \
|
"rescue_load_fit hab_check_file_fit; then " \
|
||||||
|
"run mainRargs; run rescueboot; " \
|
||||||
"else " \
|
"else " \
|
||||||
"run dead; " \
|
|
||||||
"echo RESCUE SYSTEM ON BOARD BOOT FAILURE;" \
|
"echo RESCUE SYSTEM ON BOARD BOOT FAILURE;" \
|
||||||
|
"run dead; " \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"fi;\0" \
|
"fi;\0" \
|
||||||
"ari_boot=if test ${bootmode} -ne 0 ; then " \
|
"ari_boot=if test ${bootmode} -ne 0 ; then " \
|
||||||
|
|
@ -388,7 +389,8 @@
|
||||||
"if run loadbootscript hab_check_file_bootscript;" \
|
"if run loadbootscript hab_check_file_bootscript;" \
|
||||||
"then run bootscript; " \
|
"then run bootscript; " \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"if run mmc_load_fit hab_check_file_fit; then " \
|
"if run mmc_load_pubkey hab_check_addr " \
|
||||||
|
"mmc_load_fit hab_check_file_fit; then " \
|
||||||
"if run mmcboot; then ; " \
|
"if run mmcboot; then ; " \
|
||||||
"else " \
|
"else " \
|
||||||
"run mmc_rescue_boot;" \
|
"run mmc_rescue_boot;" \
|
||||||
|
|
@ -421,12 +423,6 @@
|
||||||
|
|
||||||
#define CONFIG_SYS_FSL_USDHC_NUM 2
|
#define CONFIG_SYS_FSL_USDHC_NUM 2
|
||||||
|
|
||||||
/* NAND stuff */
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
|
||||||
#define CONFIG_SYS_NAND_BASE 0x40000000
|
|
||||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
|
|
||||||
#define CONFIG_SYS_NAND_ONFI_DETECTION
|
|
||||||
|
|
||||||
/* DMA stuff, needed for GPMI/MXS NAND support */
|
/* DMA stuff, needed for GPMI/MXS NAND support */
|
||||||
|
|
||||||
/* USB Configs */
|
/* USB Configs */
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue