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ARM: zynq: Add MIO detection code
Add run-time MIO pin detection to get actual pin configuration for specific periphery. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2 changed files with 51 additions and 0 deletions
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@ -17,6 +17,26 @@
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#define SLCR_IDCODE_MASK 0x1F000
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#define SLCR_IDCODE_MASK 0x1F000
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#define SLCR_IDCODE_SHIFT 12
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#define SLCR_IDCODE_SHIFT 12
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/*
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* zynq_slcr_mio_get_status - Get the status of MIO peripheral.
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*
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* @peri_name: Name of the peripheral for checking MIO status
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* @get_pins: Pointer to array of get pin for this peripheral
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* @num_pins: Number of pins for this peripheral
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* @mask: Mask value
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* @check_val: Required check value to get the status of periph
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*/
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struct zynq_slcr_mio_get_status {
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const char *peri_name;
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const int *get_pins;
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int num_pins;
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u32 mask;
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u32 check_val;
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};
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static const struct zynq_slcr_mio_get_status mio_periphs[] = {
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};
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static int slcr_lock = 1; /* 1 means locked, 0 means unlocked */
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static int slcr_lock = 1; /* 1 means locked, 0 means unlocked */
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void zynq_slcr_lock(void)
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void zynq_slcr_lock(void)
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@ -120,3 +140,33 @@ u32 zynq_slcr_get_idcode(void)
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return (readl(&slcr_base->pss_idcode) & SLCR_IDCODE_MASK) >>
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return (readl(&slcr_base->pss_idcode) & SLCR_IDCODE_MASK) >>
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SLCR_IDCODE_SHIFT;
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SLCR_IDCODE_SHIFT;
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}
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}
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/*
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* zynq_slcr_get_mio_pin_status - Get the MIO pin status of peripheral.
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*
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* @periph: Name of the peripheral
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*
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* Returns count to indicate the number of pins configured for the
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* given @periph.
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*/
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int zynq_slcr_get_mio_pin_status(const char *periph)
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{
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const struct zynq_slcr_mio_get_status *mio_ptr;
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int val, i, j;
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int mio = 0;
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for (i = 0; i < ARRAY_SIZE(mio_periphs); i++) {
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if (strcmp(periph, mio_periphs[i].peri_name) == 0) {
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mio_ptr = &mio_periphs[i];
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for (j = 0; j < mio_ptr->num_pins; j++) {
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val = readl(&slcr_base->mio_pin
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[mio_ptr->get_pins[j]]);
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if ((val & mio_ptr->mask) == mio_ptr->check_val)
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mio++;
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}
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break;
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}
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}
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return mio;
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}
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@ -15,6 +15,7 @@ extern void zynq_slcr_devcfg_disable(void);
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extern void zynq_slcr_devcfg_enable(void);
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extern void zynq_slcr_devcfg_enable(void);
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extern u32 zynq_slcr_get_boot_mode(void);
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extern u32 zynq_slcr_get_boot_mode(void);
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extern u32 zynq_slcr_get_idcode(void);
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extern u32 zynq_slcr_get_idcode(void);
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extern int zynq_slcr_get_mio_pin_status(const char *periph);
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extern void zynq_ddrc_init(void);
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extern void zynq_ddrc_init(void);
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extern unsigned int zynq_get_silicon_version(void);
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extern unsigned int zynq_get_silicon_version(void);
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