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Altera Stratix II support

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Adds Support for Altera's Stratix II.

Within your board specific init file you will have to call

1. fpga_init (/* relocated code offset. usually => */ gd->reloc_off);
2. fpga_add (fpga_altera, (Altera_desc*)&altera_desc);

Altera_desc* contines (for example):
	{
	 Altera_StratixII,	/* part type */
	 passive_serial,	/* interface type */
	 1,			/* bytes of data part can accept */
	 (void *)(&funcs),	/* interface function table */
	 0L,			/* base interface address */
	 0			/* implementation specific cookie */
	 }

funcs is the interface. It is of type altera_board_specific_func.
It looks like this:
altera_board_specific_func func = {
	pre_fn,
	config_fn,
	status_fn,
	done_fn,
	clk_fn,
	data_fn,
	abort_fn,
	post_fn,
};

you will have to implement these functions, which is usually bit
banging some gpio.

Signed-off-by: Eran Liberty <liberty@extricom.com>
This commit is contained in:
eran liberty 2008-03-27 00:50:49 +01:00 committed by Wolfgang Denk
parent 5ece9ec9f6
commit 3c735e7437
6 changed files with 324 additions and 12 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
common/Makefile
View file

@ -102,6 +102,7 @@ COBJS-y += cmd_vfd.o
COBJS-y += command.o
COBJS-y += console.o
COBJS-y += cyclon2.o
COBJS-y += stratixII.o
COBJS-y += devices.o
COBJS-y += dlmalloc.o
COBJS-y += docecc.o

43
common/altera.c
View file

@ -30,6 +30,7 @@
*/
#include <common.h>
#include <ACEX1K.h>
#include <stratixII.h>
/* Define FPGA_DEBUG to get debug printf's */
/* #define FPGA_DEBUG */
@ -43,7 +44,7 @@
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA)
/* Local Static Functions */
static int altera_validate (Altera_desc * desc, char *fn);
static int altera_validate (Altera_desc * desc, const char *fn);
/* ------------------------------------------------------------------------- */
int altera_load( Altera_desc *desc, void *buf, size_t bsize )
@ -60,7 +61,7 @@ int altera_load( Altera_desc *desc, void *buf, size_t bsize )
PRINTF ("%s: Launching the ACEX1K Loader...\n",
__FUNCTION__);
ret_val = ACEX1K_load (desc, buf, bsize);
#elif defined CONFIG_FPGA_CYCLON2
#elif defined(CONFIG_FPGA_CYCLON2)
PRINTF ("%s: Launching the CYCLON II Loader...\n",
__FUNCTION__);
ret_val = CYC2_load (desc, buf, bsize);
@ -70,6 +71,13 @@ int altera_load( Altera_desc *desc, void *buf, size_t bsize )
#endif
break;
#if defined(CONFIG_FPGA_STRATIX_II)
case Altera_StratixII:
PRINTF ("%s: Launching the Stratix II Loader...\n",
__FUNCTION__);
ret_val = StratixII_load (desc, buf, bsize);
break;
#endif
default:
printf ("%s: Unsupported family type, %d\n",
__FUNCTION__, desc->family);
@ -98,6 +106,13 @@ int altera_dump( Altera_desc *desc, void *buf, size_t bsize )
#endif
break;
#if defined(CONFIG_FPGA_STRATIX_II)
case Altera_StratixII:
PRINTF ("%s: Launching the Stratix II Reader...\n",
__FUNCTION__);
ret_val = StratixII_dump (desc, buf, bsize);
break;
#endif
default:
printf ("%s: Unsupported family type, %d\n",
__FUNCTION__, desc->family);
@ -117,10 +132,13 @@ int altera_info( Altera_desc *desc )
case Altera_ACEX1K:
printf ("ACEX1K\n");
break;
/* Add new family types here */
case Altera_CYC2:
printf ("CYCLON II\n");
break;
case Altera_StratixII:
printf ("Stratix II\n");
break;
/* Add new family types here */
default:
printf ("Unknown family type, %d\n", desc->family);
}
@ -142,6 +160,13 @@ int altera_info( Altera_desc *desc )
case altera_jtag_mode: /* Not used */
printf ("JTAG Mode\n");
break;
case fast_passive_parallel:
printf ("Fast Passive Parallel (FPP)\n");
break;
case fast_passive_parallel_security:
printf
("Fast Passive Parallel with Security (FPPS) \n");
break;
/* Add new interface types here */
default:
printf ("Unsupported interface type, %d\n", desc->iface);
@ -166,6 +191,11 @@ int altera_info( Altera_desc *desc )
__FUNCTION__);
#endif
break;
#if defined(CONFIG_FPGA_STRATIX_II)
case Altera_StratixII:
StratixII_info (desc);
break;
#endif
/* Add new family types here */
default:
/* we don't need a message here - we give one up above */
@ -199,6 +229,11 @@ int altera_reloc( Altera_desc *desc, ulong reloc_offset)
__FUNCTION__);
#endif
break;
#if defined(CONFIG_FPGA_STRATIX_II)
case Altera_StratixII:
ret_val = StratixII_reloc (desc, reloc_offset);
break;
#endif
case Altera_CYC2:
#if defined(CONFIG_FPGA_CYCLON2)
ret_val = CYC2_reloc (desc, reloc_offset);
@ -219,7 +254,7 @@ int altera_reloc( Altera_desc *desc, ulong reloc_offset)
/* ------------------------------------------------------------------------- */
static int altera_validate (Altera_desc * desc, char *fn)
static int altera_validate (Altera_desc * desc, const char *fn)
{
int ret_val = FALSE;

4
common/fpga.c
View file

@ -199,10 +199,6 @@ void fpga_init( ulong reloc_off )
memset( desc_table, 0, sizeof(desc_table));
PRINTF( "%s: CONFIG_FPGA = 0x%x\n", __FUNCTION__, CONFIG_FPGA );
#if 0
PRINTF( "%s: CFG_FPGA_XILINX = 0x%x\n", __FUNCTION__, CFG_FPGA_XILINX );
PRINTF( "%s: CFG_FPGA_ALTERA = 0x%x\n", __FUNCTION__, CFG_FPGA_ALTERA );
#endif
}
/* fpga_count

235
common/stratixII.c Normal file
View file

@ -0,0 +1,235 @@
/*
* (C) Copyright 2007
* Eran Liberty, Extricom , eran.liberty@gmail.com
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h> /* core U-Boot definitions */
#include <altera.h>
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_STRATIX_II)
int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize,
int isSerial, int isSecure);
int StratixII_ps_fpp_dump (Altera_desc * desc, void *buf, size_t bsize);
/****************************************************************/
/* Stratix II Generic Implementation */
int StratixII_load (Altera_desc * desc, void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case passive_serial:
ret_val = StratixII_ps_fpp_load (desc, buf, bsize, 1, 0);
break;
case fast_passive_parallel:
ret_val = StratixII_ps_fpp_load (desc, buf, bsize, 0, 0);
break;
case fast_passive_parallel_security:
ret_val = StratixII_ps_fpp_load (desc, buf, bsize, 0, 1);
break;
/* Add new interface types here */
default:
printf ("%s: Unsupported interface type, %d\n", __FUNCTION__,
desc->iface);
}
return ret_val;
}
int StratixII_dump (Altera_desc * desc, void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case passive_serial:
case fast_passive_parallel:
case fast_passive_parallel_security:
ret_val = StratixII_ps_fpp_dump (desc, buf, bsize);
break;
/* Add new interface types here */
default:
printf ("%s: Unsupported interface type, %d\n", __FUNCTION__,
desc->iface);
}
return ret_val;
}
int StratixII_info (Altera_desc * desc)
{
return FPGA_SUCCESS;
}
int StratixII_reloc (Altera_desc * desc, ulong reloc_offset)
{
int i;
uint32_t dest = (uint32_t) desc & 0xff000000;
/* we assume a relocated code and non relocated code has different upper 8 bits */
if (dest != ((uint32_t) desc->iface_fns & 0xff000000)) {
desc->iface_fns =
(void *)((uint32_t) (desc->iface_fns) + reloc_offset);
}
for (i = 0; i < sizeof (altera_board_specific_func) / sizeof (void *);
i++) {
if (dest !=
((uint32_t) (((void **)(desc->iface_fns))[i]) & 0xff000000))
{
((void **)(desc->iface_fns))[i] =
(void
*)(((uint32_t) (((void **)(desc->iface_fns))[i])) +
reloc_offset);
}
}
return FPGA_SUCCESS;
}
int StratixII_ps_fpp_dump (Altera_desc * desc, void *buf, size_t bsize)
{
printf ("Stratix II Fast Passive Parallel dump is not implemented\n");
return FPGA_FAIL;
}
int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize,
int isSerial, int isSecure)
{
altera_board_specific_func *fns;
int cookie;
int ret_val = FPGA_FAIL;
int bytecount;
char *buff = buf;
int i;
if (!desc) {
printf ("%s(%d) Altera_desc missing\n", __FUNCTION__, __LINE__);
return FPGA_FAIL;
}
if (!buff) {
printf ("%s(%d) buffer is missing\n", __FUNCTION__, __LINE__);
return FPGA_FAIL;
}
if (!bsize) {
printf ("%s(%d) size is zero\n", __FUNCTION__, __LINE__);
return FPGA_FAIL;
}
if (!desc->iface_fns) {
printf
("%s(%d) Altera_desc function interface table is missing\n",
__FUNCTION__, __LINE__);
return FPGA_FAIL;
}
fns = (altera_board_specific_func *) (desc->iface_fns);
cookie = desc->cookie;
if (!
(fns->config && fns->status && fns->done && fns->data
&& fns->abort)) {
printf
("%s(%d) Missing some function in the function interface table\n",
__FUNCTION__, __LINE__);
return FPGA_FAIL;
}
/* 1. give board specific a chance to do anything before we start */
if (fns->pre) {
if ((ret_val = fns->pre (cookie)) < 0) {
return ret_val;
}
}
/* from this point on we must fail gracfully by calling lower layer abort */
/* 2. Strat burn cycle by deasserting config for t_CFG and waiting t_CF2CK after reaserted */
fns->config (0, 1, cookie);
udelay (5); /* nCONFIG low pulse width 2usec */
fns->config (1, 1, cookie);
udelay (100); /* nCONFIG high to first rising edge on DCLK */
/* 3. Start the Data cycle with clk deasserted */
bytecount = 0;
fns->clk (0, 1, cookie);
printf ("loading to fpga ");
while (bytecount < bsize) {
/* 3.1 check stratix has not signaled us an error */
if (fns->status (cookie) != 1) {
printf
("\n%s(%d) Stratix failed (byte transfered till failure 0x%x)\n",
__FUNCTION__, __LINE__, bytecount);
fns->abort (cookie);
return FPGA_FAIL;
}
if (isSerial) {
int i;
uint8_t data = buff[bytecount++];
for (i = 0; i < 8; i++) {
/* 3.2(ps) put data on the bus */
fns->data ((data >> i) & 1, 1, cookie);
/* 3.3(ps) clock once */
fns->clk (1, 1, cookie);
fns->clk (0, 1, cookie);
}
} else {
/* 3.2(fpp) put data on the bus */
fns->data (buff[bytecount++], 1, cookie);
/* 3.3(fpp) clock once */
fns->clk (1, 1, cookie);
fns->clk (0, 1, cookie);
/* 3.4(fpp) for secure cycle push 3 more clocks */
for (i = 0; isSecure && i < 3; i++) {
fns->clk (1, 1, cookie);
fns->clk (0, 1, cookie);
}
}
/* 3.5 while clk is deasserted it is safe to print some progress indication */
if ((bytecount % (bsize / 100)) == 0) {
printf ("\b\b\b%02d\%", bytecount * 100 / bsize);
}
}
/* 4. Set one last clock and check conf done signal */
fns->clk (1, 1, cookie);
udelay (100);
if (!fns->done (cookie)) {
printf (" error!.\n");
fns->abort (cookie);
return FPGA_FAIL;
} else {
printf ("\b\b\b done.\n");
}
/* 5. call lower layer post configuration */
if (fns->post) {
if ((ret_val = fns->post (cookie)) < 0) {
fns->abort (cookie);
return ret_val;
}
}
return FPGA_SUCCESS;
}
#endif /* defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_STRATIX_II) */

21
include/altera.h
View file

@ -27,22 +27,21 @@
#ifndef _ALTERA_H_
#define _ALTERA_H_
/*
* See include/xilinx.h for another working example.
*/
/* Altera Model definitions
*********************************************************************/
#define CFG_ACEX1K CFG_FPGA_DEV( 0x1 )
#define CFG_CYCLON2 CFG_FPGA_DEV( 0x2 )
#define CFG_STRATIX_II CFG_FPGA_DEV( 0x4 )
#define CFG_ALTERA_ACEX1K (CFG_FPGA_ALTERA | CFG_ACEX1K)
#define CFG_ALTERA_CYCLON2 (CFG_FPGA_ALTERA | CFG_CYCLON2)
#define CFG_ALTERA_STRATIX_II (CFG_FPGA_ALTERA | CFG_STRATIX_II)
/* Add new models here */
/* Altera Interface definitions
*********************************************************************/
#define CFG_ALTERA_IF_PS CFG_FPGA_IF( 0x1 ) /* passive serial */
#define CFG_ALTERA_IF_FPP CFG_FPGA_IF( 0x2 ) /* fast passive parallel */
/* Add new interfaces here */
typedef enum { /* typedef Altera_iface */
@ -52,6 +51,8 @@ typedef enum { /* typedef Altera_iface */
passive_parallel_asynchronous, /* parallel data */
passive_serial_asynchronous, /* serial data w/ internal clock (not used) */
altera_jtag_mode, /* jtag/tap serial (not used ) */
fast_passive_parallel, /* fast passive parallel (FPP) */
fast_passive_parallel_security, /* fast passive parallel with security (FPPS) */
max_altera_iface_type /* insert all new types before this */
} Altera_iface; /* end, typedef Altera_iface */
@ -59,6 +60,7 @@ typedef enum { /* typedef Altera_Family */
min_altera_type, /* insert all new types after this */
Altera_ACEX1K, /* ACEX1K Family */
Altera_CYC2, /* CYCLONII Family */
Altera_StratixII, /* StratixII Familiy */
/* Add new models here */
max_altera_type /* insert all new types before this */
} Altera_Family; /* end, typedef Altera_Family */
@ -91,4 +93,15 @@ typedef int (*Altera_write_fn)(void *buf, size_t len, int flush, int cookie);
typedef int (*Altera_abort_fn)( int cookie );
typedef int (*Altera_post_fn)( int cookie );
typedef struct {
Altera_pre_fn pre;
Altera_config_fn config;
Altera_status_fn status;
Altera_done_fn done;
Altera_clk_fn clk;
Altera_data_fn data;
Altera_abort_fn abort;
Altera_post_fn post;
} altera_board_specific_func;
#endif /* _ALTERA_H_ */

32
include/stratixII.h Normal file
View file

@ -0,0 +1,32 @@
/*
* (C) Copyright 2007
* Eran Liberty, Extricom, eran.liberty@gmail.com
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#ifndef _STRATIXII_H_
#define _STRATIXII_H_
extern int StratixII_load (Altera_desc * desc, void *image, size_t size);
extern int StratixII_dump (Altera_desc * desc, void *buf, size_t bsize);
extern int StratixII_info (Altera_desc * desc);
extern int StratixII_reloc (Altera_desc * desc, ulong reloc_off);
#endif /* _STRATIXII_H_ */