Merge git://git.denx.de/u-boot-imx

This commit is contained in:
Tom Rini 2017-12-29 09:27:04 -05:00
commit 3bb6dc04a9
54 changed files with 522 additions and 265 deletions

View file

@ -23,10 +23,18 @@
serial1 = &uart2;
};
tzic: tz-interrupt-controller@fffc000 {
compatible = "fsl,imx53-tzic", "fsl,tzic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x0fffc000 0x4000>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&tzic>;
ranges;
aips@50000000 { /* AIPS1 */

View file

@ -3,15 +3,46 @@
*
* Author: Valentin Raevsky <valentin@compulab.co.il>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx6q.dtsi"
/ {
@ -31,6 +62,118 @@
linux,default-trigger = "heartbeat";
};
};
awnh387_pwrseq: pwrseq {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwrseq>;
compatible = "mmc-pwrseq-sd8787";
powerdown-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
};
reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio {
compatible = "regulator-fixed";
regulator-name = "regulator-pcie-power-on-gpio";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
};
reg_usb_h1_vbus: usb_h1_vbus {
compatible = "regulator-fixed";
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usb_otg_vbus: usb_otg_vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
sound-analog {
compatible = "simple-audio-card";
simple-audio-card,name = "On-board analog audio";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Line", "Line Out",
"Microphone", "Mic Jack",
"Line", "Line In";
simple-audio-card,routing =
"Headphone Jack", "RHPOUT",
"Headphone Jack", "LHPOUT",
"MICIN", "Mic Bias",
"Mic Bias", "Mic Jack";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound_master>;
simple-audio-card,frame-master = <&sound_master>;
simple-audio-card,bitclock-inversion;
sound_master: simple-audio-card,cpu {
sound-dai = <&ssi2>;
system-clock-frequency = <2822400>;
};
simple-audio-card,codec {
sound-dai = <&wm8731>;
};
};
sound-spdif {
compatible = "fsl,imx-audio-spdif";
model = "imx-spdif";
spdif-controller = <&spdif>;
spdif-out;
spdif-in;
};
};
/*
* The U-Boot: audio mux node has been removed because the required dt-bindings
* header file is not present in the U-Boot.
*/
&cpu0 {
/*
* Although the imx6q fuse indicates that 1.2GHz operation is possible,
* the module behaves unstable at this frequency. Hence, remove the
* 1.2GHz operation point here.
*/
operating-points = <
/* kHz uV */
996000 1250000
852000 1250000
792000 1175000
396000 975000
>;
fsl,soc-operating-points = <
/* ARM kHz SOC-PU uV */
996000 1250000
852000 1250000
792000 1175000
396000 1175000
>;
};
&ecspi1 {
cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio3 19 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;
};
};
&fec {
@ -46,58 +189,176 @@
status = "okay";
};
&iomuxc {
imx6q-cm-fx6 {
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>;
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
clock-frequency = <100000>;
pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>;
};
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
wm8731: codec@1a {
#sound-dai-cells = <0>;
compatible = "wlf,wm8731";
reg = <0x1a>;
};
};
&iomuxc {
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059
MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059
MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059
MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059
MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
>;
};
pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1
>;
};
pinctrl_pwrseq: pwrseqgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
>;
};
pinctrl_spdif: spdifgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>;
};
pinctrl_usbh1: usbh1grp {
fsl,pins = <
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
>;
};
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
vpcie-supply = <&reg_pcie_power_on_gpio>;
status = "okay";
};
&sata {
status = "okay";
};
&snvs_poweroff {
status = "okay";
};
&spdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spdif>;
status = "okay";
};
&ssi2 {
assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>,
<&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
assigned-clock-rates = <0>, <786432000>;
status = "okay";
};
&uart4 {
@ -106,10 +367,37 @@
status = "okay";
};
&sata {
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
dr_mode = "otg";
status = "okay";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
mmc-pwrseq = <&awnh387_pwrseq>;
non-removable;
/*
* If the OS probes the Bluetooth AMP function advertised on this bus
* but the firmware in place does not support it, the WiFi/BT module
* gets unresponsive.
* Users who configured their OS properly can enable this node to gain
* WiFi and/or plain Bluetooth support.
*/
status = "disabled";
};
/* The U-Boot: enable usdhc3 for mmc boot */
&usdhc3 {
status = "okay";
};

View file

@ -109,6 +109,9 @@ void imx_wdog_disable_powerdown(void);
int board_mmc_get_env_dev(int devno);
int nxp_board_rev(void);
char nxp_board_rev_string(void);
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()

View file

@ -1,3 +1,6 @@
config HAS_CAAM
bool
config IMX_CONFIG
string
@ -28,7 +31,7 @@ config USE_IMXIMG_PLUGIN
config SECURE_BOOT
bool "Support i.MX HAB features"
depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5
select FSL_CAAM
select FSL_CAAM if HAS_CAAM
imply CMD_DEKBLOB
help
This option enables the support for secure boot (HAB).
@ -61,3 +64,11 @@ config CMD_HDMIDETECT
help
This enables the 'hdmidet' command which detects if an HDMI monitor
is connected.
config NXP_BOARD_REVISION
bool "Read NXP board revision from fuses"
depends on ARCH_MX6 || ARCH_MX7
help
NXP boards based on i.MX6/7 contain the board revision information
stored in the fuses. Select this option if you want to be able to
retrieve the board revision information.

View file

@ -323,3 +323,28 @@ void set_chipselect_size(int const cs_size)
writel(reg, &iomuxc_regs->gpr[1]);
}
#ifdef CONFIG_NXP_BOARD_REVISION
int nxp_board_rev(void)
{
/*
* Get Board ID information from OCOTP_GP1[15:8]
* RevA: 0x1
* RevB: 0x2
* RevC: 0x3
*/
struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
struct fuse_bank *bank = &ocotp->bank[4];
struct fuse_bank4_regs *fuse =
(struct fuse_bank4_regs *)bank->fuse_regs;
return (readl(&fuse->gp1) >> 8 & 0x0F);
}
char nxp_board_rev_string(void)
{
const char *rev = "A";
return (*rev + nxp_board_rev() - 1);
}
#endif

View file

@ -14,28 +14,34 @@ config MX6
imply CMD_FUSE
config MX6D
select HAS_CAAM
select MX6_SMP
bool
config MX6DL
select HAS_CAAM
select MX6_SMP
bool
config MX6Q
select HAS_CAAM
select MX6_SMP
bool
config MX6QDL
select HAS_CAAM
select MX6_SMP
bool
config MX6S
select HAS_CAAM
bool
config MX6SL
bool
config MX6SX
select HAS_CAAM
select ROM_UNIFIED_SECTIONS
bool
@ -44,6 +50,7 @@ config MX6SLL
bool
config MX6UL
select HAS_CAAM
select SYS_L2CACHE_OFF
select ROM_UNIFIED_SECTIONS
bool
@ -66,8 +73,9 @@ config MX6UL_OPOS6UL
select SUPPORT_SPL
config MX6ULL
select SYS_L2CACHE_OFF
select ROM_UNIFIED_SECTIONS
bool
select MX6UL
config MX6_DDRCAL
bool "Include dynamic DDR calibration routines"
@ -244,6 +252,7 @@ config TARGET_MX6SABRESD
config TARGET_MX6SLEVK
bool "mx6slevk"
select MX6SL
select SUPPORT_SPL
config TARGET_MX6SLLEVK
@ -255,6 +264,7 @@ config TARGET_MX6SLLEVK
config TARGET_MX6SXSABRESD
bool "mx6sxsabresd"
select BOARD_LATE_INIT
select MX6SX
select SUPPORT_SPL
select DM
@ -395,6 +405,7 @@ config TARGET_WANDBOARD
config TARGET_WARP
bool "WaRP"
select MX6SL
select BOARD_LATE_INIT
config TARGET_XPRESS

View file

@ -10,6 +10,7 @@ config MX7
default y
config MX7D
select HAS_CAAM
select ROM_UNIFIED_SECTIONS
imply CMD_FUSE
bool

View file

@ -210,48 +210,6 @@ static int cm_fx6_setup_issd(void)
#define CM_FX6_SATA_INIT_RETRIES 10
# if !CONFIG_IS_ENABLED(AHCI)
int sata_initialize(void)
{
int err, i;
/* Make sure this gpio has logical 0 value */
gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0);
udelay(100);
cm_fx6_sata_power(1);
for (i = 0; i < CM_FX6_SATA_INIT_RETRIES; i++) {
err = setup_sata();
if (err) {
printf("SATA setup failed: %d\n", err);
return err;
}
udelay(100);
err = __sata_initialize();
if (!err)
break;
/* There is no device on the SATA port */
if (sata_port_status(0, 0) == 0)
break;
/* There's a device, but link not established. Retry */
}
return err;
}
int sata_stop(void)
{
__sata_stop();
cm_fx6_sata_power(0);
mdelay(250);
return 0;
}
# endif
#else
static int cm_fx6_setup_issd(void) { return 0; }
#endif
@ -548,35 +506,6 @@ static void cm_fx6_setup_gpmi_nand(void)
static void cm_fx6_setup_gpmi_nand(void) {}
#endif
#ifdef CONFIG_FSL_ESDHC
static struct fsl_esdhc_cfg usdhc_cfg[3] = {
{USDHC1_BASE_ADDR},
{USDHC2_BASE_ADDR},
{USDHC3_BASE_ADDR},
};
static enum mxc_clock usdhc_clk[3] = {
MXC_ESDHC_CLK,
MXC_ESDHC2_CLK,
MXC_ESDHC3_CLK,
};
int board_mmc_init(bd_t *bis)
{
int i;
cm_fx6_set_usdhc_iomux();
for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
usdhc_cfg[i].sdhc_clk = mxc_get_clock(usdhc_clk[i]);
usdhc_cfg[i].max_bus_width = 4;
fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
enable_usdhc_clk(1, i);
}
return 0;
}
#endif
#ifdef CONFIG_MXC_SPI
int cm_fx6_setup_ecspi(void)
{

View file

@ -387,10 +387,6 @@ void board_init_f(ulong dummy)
&dhcom6sdl_grp_ioregs);
mx6_dram_cfg(&dhcom_ddr_info, &dhcom_mmdc_calib, &dhcom_mem_ddr);
/* Perform DDR DRAM calibration */
udelay(100);
mmdc_do_dqs_calibration(&dhcom_ddr_info);
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);

View file

@ -397,39 +397,9 @@ int board_eth_init(bd_t *bis)
return cpu_eth_init(bis);
}
#define BOARD_REV_B 0x200
#define BOARD_REV_A 0x100
static int mx6sabre_rev(void)
{
/*
* Get Board ID information from OCOTP_GP1[15:8]
* i.MX6Q ARD RevA: 0x01
* i.MX6Q ARD RevB: 0x02
*/
struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
struct fuse_bank *bank = &ocotp->bank[4];
struct fuse_bank4_regs *fuse =
(struct fuse_bank4_regs *)bank->fuse_regs;
int reg = readl(&fuse->gp1);
int ret;
switch (reg >> 8 & 0x0F) {
case 0x02:
ret = BOARD_REV_B;
break;
case 0x01:
default:
ret = BOARD_REV_A;
break;
}
return ret;
}
u32 get_board_rev(void)
{
int rev = mx6sabre_rev();
int rev = nxp_board_rev();
return (get_cpu_rev() & ~(0xF << 8)) | rev;
}
@ -703,20 +673,7 @@ int board_late_init(void)
int checkboard(void)
{
int rev = mx6sabre_rev();
char *revname;
switch (rev) {
case BOARD_REV_B:
revname = "B";
break;
case BOARD_REV_A:
default:
revname = "A";
break;
}
printf("Board: MX6Q-Sabreauto rev%s\n", revname);
printf("Board: MX6Q-Sabreauto rev%c\n", nxp_board_rev_string());
return 0;
}

View file

@ -8,6 +8,8 @@
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
@ -20,6 +22,13 @@ IMAGE_VERSION 2
BOOT_FROM sd
/*
* Secure boot support
*/
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*

View file

@ -540,9 +540,23 @@ int board_init(void)
return 0;
}
static bool is_reva(void)
{
return (nxp_board_rev() == 1);
}
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (is_reva())
env_set("board_rev", "REVA");
#endif
return 0;
}
int checkboard(void)
{
puts("Board: MX6SX SABRE SDB\n");
printf("Board: MX6SX SABRE SDB rev%c\n", nxp_board_rev_string());
return 0;
}

View file

@ -4,4 +4,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := vpd_reader.o
obj-y := vpd_reader.o ge_common.o

View file

@ -0,0 +1,55 @@
/*
* Copyright 2017 General Electric Company
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <i2c.h>
#include <rtc.h>
void check_time(void)
{
int ret, i;
struct rtc_time tm;
u8 retry = 3;
unsigned int current_i2c_bus = i2c_get_bus_num();
ret = i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM);
if (ret < 0)
return;
rtc_init();
for (i = 0; i < retry; i++) {
ret = rtc_get(&tm);
if (!ret || ret == -EINVAL)
break;
}
if (ret < 0)
env_set("rtc_status", "RTC_ERROR");
if (tm.tm_year > 2037) {
tm.tm_sec = 0;
tm.tm_min = 0;
tm.tm_hour = 0;
tm.tm_mday = 1;
tm.tm_wday = 2;
tm.tm_mon = 1;
tm.tm_year = 2036;
for (i = 0; i < retry; i++) {
ret = rtc_set(&tm);
if (!ret)
break;
}
if (ret < 0)
env_set("rtc_status", "RTC_ERROR");
}
i2c_set_bus_num(current_i2c_bus);
}

View file

@ -0,0 +1,7 @@
/*
* Copyright 2017 General Electric Company
*
* SPDX-License-Identifier: GPL-2.0+
*/
void check_time(void);

View file

@ -33,8 +33,8 @@
#include <watchdog.h>
#include "ppd_gpio.h"
#include <stdlib.h>
#include "../../ge/common/ge_common.h"
#include "../../ge/common/vpd_reader.h"
#include <rtc.h>
#define MX53PPD_LCD_POWER IMX_GPIO_NR(3, 24)
@ -357,51 +357,6 @@ static int read_vpd(uint eeprom_bus)
return res;
}
static void check_time(void)
{
int ret, i;
struct rtc_time tm;
u8 retry = 3;
unsigned int current_i2c_bus = i2c_get_bus_num();
ret = i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM);
if (ret < 0)
return;
rtc_init();
for (i = 0; i < retry; i++) {
ret = rtc_get(&tm);
if (!ret || ret == -EINVAL)
break;
}
if (ret < 0)
env_set("rtc_status", "RTC_ERROR");
if (tm.tm_year > 2037) {
tm.tm_sec = 0;
tm.tm_min = 0;
tm.tm_hour = 0;
tm.tm_mday = 1;
tm.tm_wday = 2;
tm.tm_mon = 1;
tm.tm_year = 2036;
for (i = 0; i < retry; i++) {
ret = rtc_set(&tm);
if (!ret)
break;
}
if (ret < 0)
env_set("rtc_status", "RTC_ERROR");
}
i2c_set_bus_num(current_i2c_bus);
}
int board_init(void)
{
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;

View file

@ -8,6 +8,8 @@
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
@ -20,6 +22,13 @@ IMAGE_VERSION 2
BOOT_FROM sd
/*
* Secure boot support
*/
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*

View file

@ -53,6 +53,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:768k(uboot),256k(uboot-environment),-(r
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DWC_AHSATA=y
CONFIG_DM_KEYBOARD=y
CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View file

@ -11,6 +11,8 @@ CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run factory"
CONFIG_SPL=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set

View file

@ -4,7 +4,6 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y

View file

@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_ARCH_MX25=y
CONFIG_TARGET_MX25PDK=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg"
CONFIG_BOOTDELAY=1
CONFIG_DEFAULT_FDT_FILE="imx25-pdk.dtb"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y

View file

@ -5,7 +5,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE"
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y

View file

@ -5,7 +5,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y

View file

@ -4,7 +4,6 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y

View file

@ -4,7 +4,6 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y

View file

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_MX31ADS=y
CONFIG_BOOTDELAY=3
CONFIG_CMD_IMLS=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set

View file

@ -5,7 +5,6 @@ CONFIG_TARGET_MX31PDK=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_BOOTDELAY=1
CONFIG_SPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPI=y

View file

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_MX35PDK=y
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y

View file

@ -3,7 +3,6 @@ CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX51EVK=y
# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg"
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y

View file

@ -3,7 +3,6 @@ CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX53ARD=y
# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg"
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="imx53-ard.dtb"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y

View file

@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX53EVK=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53evk/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y

View file

@ -3,7 +3,6 @@ CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX53LOCO=y
# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg"
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y

View file

@ -3,7 +3,6 @@ CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX53SMD=y
# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53smd/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y

View file

@ -8,8 +8,8 @@ CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_NXP_BOARD_REVISION=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y

View file

@ -9,7 +9,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y

View file

@ -3,8 +3,7 @@ CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6SLEVK=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
CONFIG_BOOTDELAY=3
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y

View file

@ -3,9 +3,8 @@ CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6SLEVK=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg"
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y

View file

@ -10,8 +10,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6SL"
CONFIG_BOOTDELAY=3
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y

View file

@ -4,7 +4,6 @@ CONFIG_TARGET_MX6SLLEVK=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y

View file

@ -5,7 +5,6 @@ CONFIG_USE_IMXIMG_PLUGIN=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y

View file

@ -4,7 +4,6 @@ CONFIG_TARGET_MX6SXSABREAUTO=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sabreauto"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabreauto/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set

View file

@ -2,8 +2,8 @@ CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6SXSABRESD=y
# CONFIG_CMD_BMODE is not set
CONFIG_NXP_BOARD_REVISION=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y

View file

@ -9,8 +9,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
# CONFIG_CMD_BMODE is not set
CONFIG_NXP_BOARD_REVISION=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL=y

View file

@ -9,7 +9,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y

View file

@ -9,7 +9,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y

View file

@ -3,7 +3,6 @@ CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6ULL_14X14_EVK=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y

View file

@ -4,7 +4,6 @@ CONFIG_TARGET_MX6ULL_14X14_EVK=y
CONFIG_USE_IMXIMG_PLUGIN=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y

View file

@ -7,7 +7,6 @@ CONFIG_IMX_BOOTAUX=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y

View file

@ -8,7 +8,6 @@ CONFIG_IMX_BOOTAUX=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y

View file

@ -12,6 +12,7 @@ CONFIG_CMD_HDMIDETECT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
# CONFIG_DISPLAY_BOARDINFO is not set

View file

@ -2,7 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_WARP=y
# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp/imximage.cfg,MX6SL"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y

View file

@ -65,9 +65,6 @@
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 32
#ifndef CONFIG_SYS_DCACHE_OFF
#endif
/* GPIO */
#define CONFIG_MXC_GPIO

View file

@ -43,6 +43,7 @@
#define UPDATE_M4_ENV ""
#endif
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
UPDATE_M4_ENV \
"script=boot.scr\0" \
@ -105,10 +106,13 @@
"fi; " \
"else " \
"bootz; " \
"fi;\0"
"fi;\0" \
"findfdt="\
"if test test $board_rev = REVA ; then " \
"setenv fdt_file imx6sx-sdb-reva.dtb; fi; " \
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev};" \
"run findfdt; " \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \

View file

@ -11,6 +11,7 @@
#ifndef __CORE_PMIC_H_
#define __CORE_PMIC_H_
#include <dm/ofnode.h>
#include <i2c.h>
#include <linux/list.h>
#include <power/power_chrg.h>