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powerpc: mpc8541: Remove macro CONFIG_MPC8541

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Replace CONFIG_MPC8541 with ARCH_MPC8541 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
York Sun 2016-11-16 11:18:31 -08:00
parent 1ac8e0709e
commit 3aff30825e
13 changed files with 16 additions and 14 deletions
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4
arch/powerpc/cpu/mpc85xx/Kconfig
View file

@ -64,6 +64,7 @@ config TARGET_MPC8540ADS
config TARGET_MPC8541CDS
bool "Support MPC8541CDS"
select ARCH_MPC8541
config TARGET_MPC8544DS
bool "Support MPC8544DS"
@ -197,6 +198,9 @@ config ARCH_MPC8536
config ARCH_MPC8540
bool
config ARCH_MPC8541
bool
config ARCH_MPC8544
bool

2
arch/powerpc/cpu/mpc85xx/cpu.c
View file

@ -293,7 +293,7 @@ int checkcpu (void)
int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
/* Everything after the first generation of PQ3 parts has RSTCR */
#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_MPC8541) || \
#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
defined(CONFIG_MPC8555) || defined(CONFIG_MPC8560)
unsigned long val, msr;

4
arch/powerpc/cpu/mpc85xx/speed.c
View file

@ -625,7 +625,7 @@ void get_sys_info(sys_info_t *sys_info)
* for four times the clock divider values.
*/
lcrr_div *= 4;
#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_MPC8541) && \
#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_ARCH_MPC8541) && \
!defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560)
/*
* Yes, the entire PQ38 family use the same
@ -681,7 +681,7 @@ int get_clocks (void)
* for that SOC. This information is taken from application note
* AN2919.
*/
#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_MPC8541) || \
#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555) || \
defined(CONFIG_P1022)
gd->arch.i2c1_clk = sys_info.freq_systembus;

2
arch/powerpc/include/asm/config_mpc85xx.h
View file

@ -50,7 +50,7 @@
#define CONFIG_SYS_FSL_DDRC_GEN1
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#elif defined(CONFIG_MPC8541)
#elif defined(CONFIG_ARCH_MPC8541)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 8
#define CONFIG_SYS_FSL_DDRC_GEN1

2
arch/powerpc/include/asm/cpm_85xx.h
View file

@ -77,7 +77,7 @@
*/
#define CPM_DATAONLY_BASE ((uint)128)
#define CPM_DP_NOSPACE ((uint)0x7FFFFFFF)
#if defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555)
#define CPM_FCC_SPECIAL_BASE ((uint)0x00009000)
#define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE)
#else /* MPC8540, MPC8560 */

2
arch/powerpc/include/asm/fsl_lbc.h
View file

@ -326,7 +326,7 @@ void lbc_sdram_init(void);
#define LCRR_CLKDIV 0x0000001F
#define LCRR_CLKDIV_SHIFT 0
#if defined(CONFIG_MPC83xx) || defined(CONFIG_ARCH_MPC8540) || \
defined(CONFIG_MPC8541) || defined (CONFIG_MPC8555) || \
defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555) || \
defined(CONFIG_MPC8560)
#define LCRR_CLKDIV_2 0x00000002
#define LCRR_CLKDIV_4 0x00000004

2
arch/powerpc/include/asm/immap_85xx.h
View file

@ -125,7 +125,7 @@ typedef struct ccsr_i2c {
} ccsr_i2c_t;
#if defined(CONFIG_ARCH_MPC8540) || \
defined(CONFIG_MPC8541) || \
defined(CONFIG_ARCH_MPC8541) || \
defined(CONFIG_ARCH_MPC8548) || \
defined(CONFIG_MPC8555)
/* DUART Registers */

2
drivers/ddr/fsl/ctrl_regs.c
View file

@ -1831,7 +1831,7 @@ static void set_ddr_sdram_clk_cntl(fsl_ddr_cfg_regs_t *ddr,
unsigned int clk_adjust; /* Clock adjust */
unsigned int ss_en = 0; /* Source synchronous enable */
#if defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555)
/* Per FSL Application Note: AN2805 */
ss_en = 1;
#endif

2
drivers/ddr/fsl/mpc85xx_ddr_gen1.c
View file

@ -47,7 +47,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2);
out_be32(&ddr->sdram_mode, regs->ddr_sdram_mode);
out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval);
#if defined(CONFIG_MPC8555) || defined(CONFIG_MPC8541)
#if defined(CONFIG_MPC8555) || defined(CONFIG_ARCH_MPC8541)
out_be32(&ddr->sdram_clk_cntl, regs->ddr_sdram_clk_cntl);
#endif

2
drivers/input/keyboard.c
View file

@ -21,7 +21,7 @@ static struct input_config config;
static int kbd_read_keys(struct input_config *config)
{
#if defined(CONFIG_MPC5xxx) || defined(CONFIG_ARCH_MPC8540) || \
defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555)
/* no ISR is used, so received chars must be polled */
ps2ser_check();
#endif

1
include/configs/MPC8541CDS.h
View file

@ -17,7 +17,6 @@
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_MPC8541 1 /* MPC8541 specific */
#define CONFIG_MPC8541CDS 1 /* MPC8541CDS board specific */
#define CONFIG_SYS_TEXT_BASE 0xfff80000

2
include/keyboard.h
View file

@ -99,7 +99,7 @@ extern void pckbd_leds(unsigned char leds);
#endif /* !CONFIG_DM_KEYBOARD */
#if defined(CONFIG_MPC5xxx) || defined(CONFIG_ARCH_MPC8540) || \
defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555)
int ps2ser_check(void);
#endif

1
scripts/config_whitelist.txt
View file

@ -3140,7 +3140,6 @@ CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN
CONFIG_MPC83XX_GPIO_1_INIT_VALUE
CONFIG_MPC83XX_PCI2
CONFIG_MPC850
CONFIG_MPC8541
CONFIG_MPC8541CDS
CONFIG_MPC855
CONFIG_MPC8555