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https://github.com/AsahiLinux/u-boot
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ARM: dts: rmobile: Synchronize Gen2 DTs with Linux 5.0
Synchronize R-Car Gen2 device trees with Linux 5.0, commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
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8719ca8113
commit
3abd800eb9
11 changed files with 66 additions and 20 deletions
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@ -489,8 +489,6 @@
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};
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};
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&lvds1 {
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&lvds1 {
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status = "okay";
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ports {
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ports {
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port@1 {
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port@1 {
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lvds_connector: endpoint {
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lvds_connector: endpoint {
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@ -94,9 +94,8 @@
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status = "okay";
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status = "okay";
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clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
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clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
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<&cpg CPG_MOD 726>, <&cpg CPG_MOD 725>,
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<&osc1_clk>;
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<&osc1_clk>;
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clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1", "dclkin.0";
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clock-names = "du.0", "du.1", "du.2", "dclkin.0";
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ports {
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ports {
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port@0 {
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port@0 {
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@ -104,11 +103,21 @@
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remote-endpoint = <&adv7511_in>;
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remote-endpoint = <&adv7511_in>;
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};
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};
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};
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};
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};
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};
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&lvds0 {
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ports {
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port@1 {
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port@1 {
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lvds_connector0: endpoint {
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lvds_connector0: endpoint {
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};
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};
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};
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};
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port@2 {
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};
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};
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&lvds1 {
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ports {
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port@1 {
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lvds_connector1: endpoint {
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lvds_connector1: endpoint {
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};
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};
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};
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};
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@ -318,6 +327,10 @@
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interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
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interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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interrupt-controller;
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onkey {
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compatible = "dlg,da9063-onkey";
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};
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rtc {
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rtc {
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compatible = "dlg,da9063-rtc";
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compatible = "dlg,da9063-rtc";
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};
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};
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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// SPDX-License-Identifier: GPL-2.0
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/*
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/*
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* Device Tree Source for the r8a7790 SoC
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* Device Tree Source for the R-Car H2 (R8A77900) SoC
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*
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*
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* Copyright (C) 2015 Renesas Electronics Corporation
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* Copyright (C) 2015 Renesas Electronics Corporation
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* Copyright (C) 2013-2014 Renesas Solutions Corp.
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* Copyright (C) 2013-2014 Renesas Solutions Corp.
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@ -1559,7 +1559,7 @@
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sata0: sata@ee300000 {
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sata0: sata@ee300000 {
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compatible = "renesas,sata-r8a7790",
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compatible = "renesas,sata-r8a7790",
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"renesas,rcar-gen2-sata";
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"renesas,rcar-gen2-sata";
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reg = <0 0xee300000 0 0x2000>;
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reg = <0 0xee300000 0 0x200000>;
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interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 815>;
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clocks = <&cpg CPG_MOD 815>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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@ -1570,7 +1570,7 @@
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sata1: sata@ee500000 {
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sata1: sata@ee500000 {
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compatible = "renesas,sata-r8a7790",
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compatible = "renesas,sata-r8a7790",
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"renesas,rcar-gen2-sata";
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"renesas,rcar-gen2-sata";
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reg = <0 0xee500000 0 0x2000>;
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reg = <0 0xee500000 0 0x200000>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 814>;
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clocks = <&cpg CPG_MOD 814>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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@ -479,8 +479,6 @@
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};
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};
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&lvds0 {
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&lvds0 {
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status = "okay";
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ports {
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ports {
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port@1 {
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port@1 {
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lvds_connector: endpoint {
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lvds_connector: endpoint {
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@ -482,8 +482,6 @@
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};
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};
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&lvds0 {
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&lvds0 {
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status = "okay";
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ports {
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ports {
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port@1 {
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port@1 {
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lvds_connector: endpoint {
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lvds_connector: endpoint {
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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// SPDX-License-Identifier: GPL-2.0
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/*
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/*
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* Device Tree Source for the r8a7791 SoC
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* Device Tree Source for the R-Car M2-W (R8A77910) SoC
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*
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*
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* Copyright (C) 2013-2015 Renesas Electronics Corporation
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* Copyright (C) 2013-2015 Renesas Electronics Corporation
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* Copyright (C) 2013-2014 Renesas Solutions Corp.
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* Copyright (C) 2013-2014 Renesas Solutions Corp.
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@ -1543,7 +1543,7 @@
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sata0: sata@ee300000 {
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sata0: sata@ee300000 {
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compatible = "renesas,sata-r8a7791",
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compatible = "renesas,sata-r8a7791",
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"renesas,rcar-gen2-sata";
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"renesas,rcar-gen2-sata";
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reg = <0 0xee300000 0 0x2000>;
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reg = <0 0xee300000 0 0x200000>;
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interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 815>;
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clocks = <&cpg CPG_MOD 815>;
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power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
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power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
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@ -1554,7 +1554,7 @@
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sata1: sata@ee500000 {
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sata1: sata@ee500000 {
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compatible = "renesas,sata-r8a7791",
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compatible = "renesas,sata-r8a7791",
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"renesas,rcar-gen2-sata";
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"renesas,rcar-gen2-sata";
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reg = <0 0xee500000 0 0x2000>;
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reg = <0 0xee500000 0 0x200000>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 814>;
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clocks = <&cpg CPG_MOD 814>;
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power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
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power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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// SPDX-License-Identifier: GPL-2.0
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/*
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/*
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* Device Tree Source for the r8a7792 SoC
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* Device Tree Source for the R-Car V2H (R8A77920) SoC
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*
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*
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* Copyright (C) 2016 Cogent Embedded Inc.
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* Copyright (C) 2016 Cogent Embedded Inc.
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*/
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*/
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@ -829,7 +829,6 @@
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du: display@feb00000 {
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du: display@feb00000 {
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compatible = "renesas,du-r8a7792";
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compatible = "renesas,du-r8a7792";
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reg = <0 0xfeb00000 0 0x40000>;
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reg = <0 0xfeb00000 0 0x40000>;
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reg-names = "du";
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interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 724>,
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clocks = <&cpg CPG_MOD 724>,
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@ -596,6 +596,10 @@
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status = "okay";
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status = "okay";
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};
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};
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&cpu0 {
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cpu0-supply = <&vdd_dvfs>;
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};
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&rwdt {
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&rwdt {
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timeout-sec = <60>;
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timeout-sec = <60>;
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status = "okay";
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status = "okay";
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@ -725,6 +729,18 @@
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compatible = "dlg,da9063-watchdog";
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compatible = "dlg,da9063-watchdog";
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};
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};
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};
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};
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vdd_dvfs: regulator@68 {
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compatible = "dlg,da9210";
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reg = <0x68>;
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interrupt-parent = <&irqc0>;
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interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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&i2c4 {
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&i2c4 {
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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// SPDX-License-Identifier: GPL-2.0
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/*
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/*
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* Device Tree Source for the r8a7793 SoC
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* Device Tree Source for the R-Car M2-N (R8A77930) SoC
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*
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*
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* Copyright (C) 2014-2015 Renesas Electronics Corporation
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* Copyright (C) 2014-2015 Renesas Electronics Corporation
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*/
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*/
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clock-frequency = <400000>;
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clock-frequency = <400000>;
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};
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};
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&i2c7 {
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status = "okay";
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clock-frequency = <100000>;
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pmic@58 {
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compatible = "dlg,da9063";
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reg = <0x58>;
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interrupt-parent = <&gpio3>;
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interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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onkey {
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compatible = "dlg,da9063-onkey";
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};
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rtc {
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compatible = "dlg,da9063-rtc";
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};
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wdt {
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compatible = "dlg,da9063-watchdog";
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};
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};
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};
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&mmcif0 {
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&mmcif0 {
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pinctrl-0 = <&mmcif0_pins>;
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pinctrl-0 = <&mmcif0_pins>;
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pinctrl-names = "default";
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pinctrl-names = "default";
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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// SPDX-License-Identifier: GPL-2.0
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/*
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/*
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* Device Tree Source for the r8a7794 SoC
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* Device Tree Source for the R-Car E2 (R8A77940) SoC
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*
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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* Copyright (C) 2014 Renesas Electronics Corporation
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* Copyright (C) 2014 Ulrich Hecht
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* Copyright (C) 2014 Ulrich Hecht
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@ -1349,7 +1349,6 @@
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du: display@feb00000 {
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du: display@feb00000 {
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compatible = "renesas,du-r8a7794";
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compatible = "renesas,du-r8a7794";
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reg = <0 0xfeb00000 0 0x40000>;
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reg = <0 0xfeb00000 0 0x40000>;
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reg-names = "du";
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interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
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clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
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