mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
mx5: Mark lowlevel_init board-specific code
The mx5 lowlevel_init.S contains board-specific code based on the reference design. Let's keep it since it avoids creating new lowlevel_init files and it may be used by many boards. But add a config to make it optional in order not to cause issues on boards not following this part of the reference design. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
parent
fa88ddb75f
commit
39e8576164
5 changed files with 9 additions and 1 deletions
|
@ -396,7 +396,7 @@ ENTRY(lowlevel_init)
|
||||||
mov r10, lr
|
mov r10, lr
|
||||||
mov r4, #0 /* Fix R4 to 0 */
|
mov r4, #0 /* Fix R4 to 0 */
|
||||||
|
|
||||||
#if defined(CONFIG_MX51)
|
#if defined(CONFIG_SYS_MAIN_PWR_ON)
|
||||||
ldr r0, =GPIO1_BASE_ADDR
|
ldr r0, =GPIO1_BASE_ADDR
|
||||||
ldr r1, [r0, #0x0]
|
ldr r1, [r0, #0x0]
|
||||||
orr r1, r1, #1 << 23
|
orr r1, r1, #1 << 23
|
||||||
|
|
|
@ -15,3 +15,8 @@ i.MX5x SoCs.
|
||||||
mode), which causes the effect of this failure to be much lower (in terms
|
mode), which causes the effect of this failure to be much lower (in terms
|
||||||
of frequency deviation), avoiding system failure, or at least decreasing
|
of frequency deviation), avoiding system failure, or at least decreasing
|
||||||
the likelihood of system failure.
|
the likelihood of system failure.
|
||||||
|
|
||||||
|
1.2 CONFIG_SYS_MAIN_PWR_ON: Trigger MAIN_PWR_ON upon startup.
|
||||||
|
This option should be enabled for boards having a SYS_ON_OFF_CTL signal
|
||||||
|
connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the
|
||||||
|
reference designs.
|
||||||
|
|
|
@ -261,5 +261,6 @@
|
||||||
|
|
||||||
#define CONFIG_SYS_DDR_CLKSEL 0
|
#define CONFIG_SYS_DDR_CLKSEL 0
|
||||||
#define CONFIG_SYS_CLKTL_CBCDR 0x59E35145
|
#define CONFIG_SYS_CLKTL_CBCDR 0x59E35145
|
||||||
|
#define CONFIG_SYS_MAIN_PWR_ON
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -235,6 +235,7 @@
|
||||||
|
|
||||||
#define CONFIG_SYS_DDR_CLKSEL 0
|
#define CONFIG_SYS_DDR_CLKSEL 0
|
||||||
#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
|
#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
|
||||||
|
#define CONFIG_SYS_MAIN_PWR_ON
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
/*-----------------------------------------------------------------------
|
||||||
* FLASH and environment organization
|
* FLASH and environment organization
|
||||||
|
|
|
@ -196,6 +196,7 @@
|
||||||
/* 166 MHz DDR RAM */
|
/* 166 MHz DDR RAM */
|
||||||
#define CONFIG_SYS_DDR_CLKSEL 0
|
#define CONFIG_SYS_DDR_CLKSEL 0
|
||||||
#define CONFIG_SYS_CLKTL_CBCDR 0x19239100
|
#define CONFIG_SYS_CLKTL_CBCDR 0x19239100
|
||||||
|
#define CONFIG_SYS_MAIN_PWR_ON
|
||||||
|
|
||||||
#define CONFIG_SYS_NO_FLASH
|
#define CONFIG_SYS_NO_FLASH
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue