From 398bd2965c3f0c57d36407ef79d976cb09b0e2b5 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Fri, 29 Sep 2023 16:46:42 +0300 Subject: [PATCH] arm: dts: k3-am64-evm: Mark dependent nodes for pre-relocation phase CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes. USB and MMC nodes need pinmux. Mark them as 'bootph-all' so they are available in all pre-relocation phases. Fixes below dts warning: : Warning (dmas_property): /bus@f4000/ethernet@8000000:dmas: Could not get phandle node for (cell 0) Signed-off-by: Roger Quadros Reviewed-by: Nishanth Menon --- arch/arm/dts/k3-am642-evm-u-boot.dtsi | 48 +++++++++++++++++++++++++++ arch/arm/dts/k3-am642-r5-evm.dts | 8 +++++ 2 files changed, 56 insertions(+) diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi index d06955dfbc..953bbe9aaf 100644 --- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi @@ -51,6 +51,10 @@ bootph-all; }; +&main_usb0_pins_default { + bootph-all; +}; + &usb0 { dr_mode="peripheral"; bootph-all; @@ -100,12 +104,56 @@ bootph-all; }; +&main_mmc1_pins_default { + bootph-all; +}; + &sdhci1 { bootph-all; }; +&inta_main_dmss { + bootph-all; +}; + +&main_pktdma { + bootph-all; +}; + +&mdio1_pins_default { + bootph-all; +}; + +&cpsw3g_mdio { + bootph-all; +}; + +&cpsw3g_phy0 { + bootph-all; +}; + +&rgmii1_pins_default { + bootph-all; +}; + +&rgmii2_pins_default { + bootph-all; +}; + &cpsw3g { bootph-all; + + ethernet-ports { + bootph-all; + }; +}; + +&phy_gmii_sel { + bootph-all; +}; + +&cpsw_port1 { + bootph-all; }; &cpsw_port2 { diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts index 696735d8e2..64b3c3af63 100644 --- a/arch/arm/dts/k3-am642-r5-evm.dts +++ b/arch/arm/dts/k3-am642-r5-evm.dts @@ -74,6 +74,14 @@ ti,secure-host; }; +&vtt_supply { + bootph-pre-ram; +}; + +&memorycontroller { + vtt-supply = <&vtt_supply>; +}; + &sdhci0 { clocks = <&clk_200mhz>; clock-names = "clk_xin";