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https://github.com/AsahiLinux/u-boot
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Merge git://git.denx.de/u-boot-spi
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commit
390194d43f
3 changed files with 27 additions and 6 deletions
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@ -134,11 +134,17 @@ static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len)
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debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len);
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div_u64_rem(len, spi_flash->page_size, &rem);
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if (rem)
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if (rem) {
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printf("%s: len(0x%x) isn't the multiple of page size(0x%x)\n",
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dev->name, len, spi_flash->page_size);
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return -EINVAL;
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}
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div_u64_rem(offset, spi_flash->page_size, &rem);
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if (rem)
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if (rem) {
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printf("%s: offset(0x%x) isn't the multiple of page size(0x%x)\n",
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dev->name, offset, spi_flash->page_size);
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return -EINVAL;
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}
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status = spi_claim_bus(spi);
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if (status) {
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@ -947,11 +947,25 @@ int spi_flash_scan(struct spi_flash *flash)
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if (IS_ERR_OR_NULL(info))
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return -ENOENT;
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/* Flash powers up read-only, so clear BP# bits */
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/*
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* Flash powers up read-only, so clear BP# bits.
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*
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* Note on some flash (like Macronix), QE (quad enable) bit is in the
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* same status register as BP# bits, and we need preserve its original
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* value during a reboot cycle as this is required by some platforms
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* (like Intel ICH SPI controller working under descriptor mode).
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*/
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if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
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JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
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JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
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write_sr(flash, 0);
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(JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) ||
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(JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX)) {
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u8 sr = 0;
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if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX) {
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read_sr(flash, &sr);
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sr &= STATUS_QEB_MXIC;
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}
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write_sr(flash, sr);
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}
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flash->name = info->name;
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flash->memory_map = spi->memory_map;
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@ -81,6 +81,7 @@ const struct spi_flash_info spi_flash_ids[] = {
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{"mx25l12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
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{"mx25l25635f", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) },
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{"mx25l51235f", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
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{"mx25u6435f", INFO(0xc22537, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP) },
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{"mx25l12855e", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
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{"mx66u51235f", INFO(0xc2253a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
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{"mx66l1g45g", INFO(0xc2201b, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP) },
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