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stm32mp1: update print_cpuinfo()
Display CPU part number and package information. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This commit is contained in:
parent
7f63c1e687
commit
35d568f090
2 changed files with 104 additions and 8 deletions
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@ -55,9 +55,30 @@
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#define BOOTROM_INSTANCE_SHIFT 16
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/* BSEC OTP index */
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#define BSEC_OTP_RPN 1
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#define BSEC_OTP_SERIAL 13
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#define BSEC_OTP_PKG 16
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#define BSEC_OTP_MAC 57
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/* Device Part Number (RPN) = OTP_DATA1 lower 8 bits */
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#define RPN_SHIFT 0
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#define RPN_MASK GENMASK(7, 0)
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/* Package = bit 27:29 of OTP16
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* - 100: LBGA448 (FFI) => AA = LFBGA 18x18mm 448 balls p. 0.8mm
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* - 011: LBGA354 (LCI) => AB = LFBGA 16x16mm 359 balls p. 0.8mm
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* - 010: TFBGA361 (FFC) => AC = TFBGA 12x12mm 361 balls p. 0.5mm
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* - 001: TFBGA257 (LCC) => AD = TFBGA 10x10mm 257 balls p. 0.5mm
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* - others: Reserved
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*/
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#define PKG_SHIFT 27
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#define PKG_MASK GENMASK(2, 0)
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#define PKG_AA_LBGA448 4
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#define PKG_AB_LBGA354 3
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#define PKG_AC_TFBGA361 2
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#define PKG_AD_TFBGA257 1
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#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
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#ifndef CONFIG_STM32MP1_TRUSTED
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static void security_init(void)
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@ -215,25 +236,94 @@ u32 get_cpu_rev(void)
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return (read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT;
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}
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static u32 get_otp(int index, int shift, int mask)
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{
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int ret;
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struct udevice *dev;
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u32 otp = 0;
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ret = uclass_get_device_by_driver(UCLASS_MISC,
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DM_GET_DRIVER(stm32mp_bsec),
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&dev);
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if (!ret)
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ret = misc_read(dev, STM32_BSEC_SHADOW(index),
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&otp, sizeof(otp));
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return (otp >> shift) & mask;
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}
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/* Get Device Part Number (RPN) from OTP */
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static u32 get_cpu_rpn(void)
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{
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return get_otp(BSEC_OTP_RPN, RPN_SHIFT, RPN_MASK);
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}
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u32 get_cpu_type(void)
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{
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return (read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT;
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u32 id;
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id = (read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT;
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return (id << 16) | get_cpu_rpn();
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}
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/* Get Package options from OTP */
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static u32 get_cpu_package(void)
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{
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return get_otp(BSEC_OTP_PKG, PKG_SHIFT, PKG_MASK);
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}
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#if defined(CONFIG_DISPLAY_CPUINFO)
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int print_cpuinfo(void)
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{
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char *cpu_s, *cpu_r;
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char *cpu_s, *cpu_r, *pkg;
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/* MPUs Part Numbers */
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switch (get_cpu_type()) {
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case CPU_STMP32MP15x:
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cpu_s = "15x";
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case CPU_STM32MP157Cxx:
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cpu_s = "157C";
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break;
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case CPU_STM32MP157Axx:
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cpu_s = "157A";
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break;
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case CPU_STM32MP153Cxx:
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cpu_s = "153C";
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break;
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case CPU_STM32MP153Axx:
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cpu_s = "153A";
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break;
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case CPU_STM32MP151Cxx:
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cpu_s = "151C";
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break;
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case CPU_STM32MP151Axx:
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cpu_s = "151A";
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break;
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default:
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cpu_s = "?";
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cpu_s = "????";
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break;
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}
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/* Package */
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switch (get_cpu_package()) {
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case PKG_AA_LBGA448:
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pkg = "AA";
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break;
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case PKG_AB_LBGA354:
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pkg = "AB";
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break;
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case PKG_AC_TFBGA361:
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pkg = "AC";
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break;
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case PKG_AD_TFBGA257:
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pkg = "AD";
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break;
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default:
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pkg = "??";
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break;
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}
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/* REVISION */
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switch (get_cpu_rev()) {
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case CPU_REVA:
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cpu_r = "A";
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@ -246,7 +336,7 @@ int print_cpuinfo(void)
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break;
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}
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printf("CPU: STM32MP%s.%s\n", cpu_s, cpu_r);
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printf("CPU: STM32MP%s%s Rev.%s\n", cpu_s, pkg, cpu_r);
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return 0;
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}
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@ -3,9 +3,15 @@
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* Copyright (C) 2015-2017, STMicroelectronics - All Rights Reserved
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*/
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#define CPU_STMP32MP15x 0x500
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/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit15:0)*/
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#define CPU_STM32MP157Cxx 0x05000000
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#define CPU_STM32MP157Axx 0x05000001
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#define CPU_STM32MP153Cxx 0x05000024
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#define CPU_STM32MP153Axx 0x05000025
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#define CPU_STM32MP151Cxx 0x0500002E
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#define CPU_STM32MP151Axx 0x0500002F
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/* return CPU_STMP32MPxx constants */
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/* return CPU_STMP32MP...Xxx constants */
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u32 get_cpu_type(void);
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#define CPU_REVA 0x1000
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