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ARM: dts: Keystone2: Import generic dt files from Linux Kernel
Import various generic dts files from Linux kernel so that all keystone2 platforms can be DT in U-boot. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This commit is contained in:
Lokesh Vutla
Tom Rini
parent
aaf461f9ad
commit
351f969088
2 changed files with 738 additions and 0 deletions
414
arch/arm/dts/keystone-clocks.dtsi
Normal file
414
arch/arm/dts/keystone-clocks.dtsi
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/*
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* Device Tree Source for Keystone 2 clock tree
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*
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* Copyright (C) 2013 Texas Instruments, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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clocks {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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mainmuxclk: mainmuxclk@2310108 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-mux-clock";
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clocks = <&mainpllclk>, <&refclksys>;
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reg = <0x02310108 4>;
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bit-shift = <23>;
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bit-mask = <1>;
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clock-output-names = "mainmuxclk";
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};
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chipclk1: chipclk1 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&mainmuxclk>;
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clock-div = <1>;
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clock-mult = <1>;
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clock-output-names = "chipclk1";
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};
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chipclk1rstiso: chipclk1rstiso {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&mainmuxclk>;
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clock-div = <1>;
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clock-mult = <1>;
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clock-output-names = "chipclk1rstiso";
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};
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gemtraceclk: gemtraceclk@2310120 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-divider-clock";
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clocks = <&mainmuxclk>;
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reg = <0x02310120 4>;
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bit-shift = <0>;
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bit-mask = <8>;
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clock-output-names = "gemtraceclk";
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};
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chipstmxptclk: chipstmxptclk {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-divider-clock";
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clocks = <&mainmuxclk>;
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reg = <0x02310164 4>;
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bit-shift = <0>;
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bit-mask = <8>;
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clock-output-names = "chipstmxptclk";
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};
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chipclk12: chipclk12 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1>;
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clock-div = <2>;
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clock-mult = <1>;
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clock-output-names = "chipclk12";
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};
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chipclk13: chipclk13 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1>;
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clock-div = <3>;
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clock-mult = <1>;
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clock-output-names = "chipclk13";
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};
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paclk13: paclk13 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&papllclk>;
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clock-div = <3>;
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clock-mult = <1>;
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clock-output-names = "paclk13";
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};
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chipclk14: chipclk14 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1>;
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clock-div = <4>;
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clock-mult = <1>;
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clock-output-names = "chipclk14";
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};
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chipclk16: chipclk16 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1>;
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clock-div = <6>;
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clock-mult = <1>;
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clock-output-names = "chipclk16";
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};
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chipclk112: chipclk112 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1>;
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clock-div = <12>;
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clock-mult = <1>;
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clock-output-names = "chipclk112";
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};
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chipclk124: chipclk124 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1>;
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clock-div = <24>;
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clock-mult = <1>;
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clock-output-names = "chipclk114";
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};
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chipclk1rstiso13: chipclk1rstiso13 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1rstiso>;
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clock-div = <3>;
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clock-mult = <1>;
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clock-output-names = "chipclk1rstiso13";
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};
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chipclk1rstiso14: chipclk1rstiso14 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1rstiso>;
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clock-div = <4>;
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clock-mult = <1>;
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clock-output-names = "chipclk1rstiso14";
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};
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chipclk1rstiso16: chipclk1rstiso16 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1rstiso>;
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clock-div = <6>;
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clock-mult = <1>;
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clock-output-names = "chipclk1rstiso16";
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};
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chipclk1rstiso112: chipclk1rstiso112 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&chipclk1rstiso>;
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clock-div = <12>;
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clock-mult = <1>;
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clock-output-names = "chipclk1rstiso112";
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};
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clkmodrst0: clkmodrst0 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk16>;
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clock-output-names = "modrst0";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkusb: clkusb {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk16>;
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clock-output-names = "usb";
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reg = <0x02350008 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkaemifspi: clkaemifspi {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk16>;
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clock-output-names = "aemif-spi";
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reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkdebugsstrc: clkdebugsstrc {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk13>;
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clock-output-names = "debugss-trc";
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reg = <0x02350014 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <1>;
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};
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clktetbtrc: clktetbtrc {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk13>;
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clock-output-names = "tetb-trc";
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reg = <0x02350018 0xb00>, <0x02350004 0x400>;
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reg-names = "control", "domain";
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domain-id = <1>;
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};
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clkpa: clkpa {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&paclk13>;
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clock-output-names = "pa";
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reg = <0x0235001c 0xb00>, <0x02350008 0x400>;
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reg-names = "control", "domain";
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domain-id = <2>;
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};
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clkcpgmac: clkcpgmac {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkpa>;
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clock-output-names = "cpgmac";
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reg = <0x02350020 0xb00>, <0x02350008 0x400>;
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reg-names = "control", "domain";
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domain-id = <2>;
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};
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clksa: clksa {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkpa>;
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clock-output-names = "sa";
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reg = <0x02350024 0xb00>, <0x02350008 0x400>;
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reg-names = "control", "domain";
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domain-id = <2>;
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};
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clkpcie: clkpcie {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk12>;
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clock-output-names = "pcie";
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reg = <0x02350028 0xb00>, <0x0235000c 0x400>;
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reg-names = "control", "domain";
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domain-id = <3>;
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};
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clksr: clksr {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk1rstiso112>;
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clock-output-names = "sr";
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reg = <0x02350034 0xb00>, <0x02350018 0x400>;
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reg-names = "control", "domain";
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domain-id = <6>;
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};
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clkgem0: clkgem0 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk1>;
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clock-output-names = "gem0";
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reg = <0x0235003c 0xb00>, <0x02350020 0x400>;
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reg-names = "control", "domain";
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domain-id = <8>;
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};
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clkddr30: clkddr30 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk12>;
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clock-output-names = "ddr3-0";
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reg = <0x0235005c 0xb00>, <0x02350040 0x400>;
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reg-names = "control", "domain";
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domain-id = <16>;
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};
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clkwdtimer0: clkwdtimer0 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "timer0";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkwdtimer1: clkwdtimer1 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "timer1";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkwdtimer2: clkwdtimer2 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "timer2";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkwdtimer3: clkwdtimer3 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "timer3";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clktimer15: clktimer15 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "timer15";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkuart0: clkuart0 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "uart0";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkuart1: clkuart1 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "uart1";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkaemif: clkaemif {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkaemifspi>;
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clock-output-names = "aemif";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkusim: clkusim {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "usim";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clki2c: clki2c {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "i2c";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkspi: clkspi {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkaemifspi>;
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clock-output-names = "spi";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkgpio: clkgpio {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "gpio";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkkeymgr: clkkeymgr {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&clkmodrst0>;
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clock-output-names = "keymgr";
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reg = <0x02350000 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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};
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324
arch/arm/dts/keystone.dtsi
Normal file
324
arch/arm/dts/keystone.dtsi
Normal file
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@ -0,0 +1,324 @@
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/*
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* Copyright 2013 Texas Instruments, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "skeleton.dtsi"
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/ {
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model = "Texas Instruments Keystone 2 SoC";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&gic>;
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aliases {
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serial0 = &uart0;
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};
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memory {
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reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
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};
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gic: interrupt-controller {
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compatible = "arm,cortex-a15-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x0 0x02561000 0x0 0x1000>,
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<0x0 0x02562000 0x0 0x2000>,
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<0x0 0x02564000 0x0 0x1000>,
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<0x0 0x02566000 0x0 0x2000>;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
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IRQ_TYPE_LEVEL_HIGH)>;
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupts =
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<GIC_PPI 13
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 10
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
};
|
||||
|
||||
pmu {
|
||||
compatible = "arm,cortex-a15-pmu";
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
|
||||
soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "ti,keystone","simple-bus";
|
||||
interrupt-parent = <&gic>;
|
||||
ranges = <0x0 0x0 0x0 0xc0000000>;
|
||||
dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
|
||||
|
||||
pllctrl: pll-controller@02310000 {
|
||||
compatible = "ti,keystone-pllctrl", "syscon";
|
||||
reg = <0x02310000 0x200>;
|
||||
};
|
||||
|
||||
devctrl: device-state-control@02620000 {
|
||||
compatible = "ti,keystone-devctrl", "syscon";
|
||||
reg = <0x02620000 0x1000>;
|
||||
};
|
||||
|
||||
rstctrl: reset-controller {
|
||||
compatible = "ti,keystone-reset";
|
||||
ti,syscon-pll = <&pllctrl 0xe4>;
|
||||
ti,syscon-dev = <&devctrl 0x328>;
|
||||
ti,wdt-list = <0>;
|
||||
};
|
||||
|
||||
/include/ "keystone-clocks.dtsi"
|
||||
|
||||
uart0: serial@02530c00 {
|
||||
compatible = "ns16550a";
|
||||
current-speed = <115200>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
reg = <0x02530c00 0x100>;
|
||||
clocks = <&clkuart0>;
|
||||
interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
|
||||
uart1: serial@02531000 {
|
||||
compatible = "ns16550a";
|
||||
current-speed = <115200>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
reg = <0x02531000 0x100>;
|
||||
clocks = <&clkuart1>;
|
||||
interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
|
||||
i2c0: i2c@2530000 {
|
||||
compatible = "ti,davinci-i2c";
|
||||
reg = <0x02530000 0x400>;
|
||||
clock-frequency = <100000>;
|
||||
clocks = <&clki2c>;
|
||||
interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
i2c1: i2c@2530400 {
|
||||
compatible = "ti,davinci-i2c";
|
||||
reg = <0x02530400 0x400>;
|
||||
clock-frequency = <100000>;
|
||||
clocks = <&clki2c>;
|
||||
interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
i2c2: i2c@2530800 {
|
||||
compatible = "ti,davinci-i2c";
|
||||
reg = <0x02530800 0x400>;
|
||||
clock-frequency = <100000>;
|
||||
clocks = <&clki2c>;
|
||||
interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
spi0: spi@21000400 {
|
||||
compatible = "ti,dm6441-spi";
|
||||
reg = <0x21000400 0x200>;
|
||||
num-cs = <4>;
|
||||
ti,davinci-spi-intr-line = <0>;
|
||||
interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&clkspi>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
spi1: spi@21000600 {
|
||||
compatible = "ti,dm6441-spi";
|
||||
reg = <0x21000600 0x200>;
|
||||
num-cs = <4>;
|
||||
ti,davinci-spi-intr-line = <0>;
|
||||
interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&clkspi>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
spi2: spi@21000800 {
|
||||
compatible = "ti,dm6441-spi";
|
||||
reg = <0x21000800 0x200>;
|
||||
num-cs = <4>;
|
||||
ti,davinci-spi-intr-line = <0>;
|
||||
interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&clkspi>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
usb_phy: usb_phy@2620738 {
|
||||
compatible = "ti,keystone-usbphy";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x2620738 24>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb: usb@2680000 {
|
||||
compatible = "ti,keystone-dwc3";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x2680000 0x10000>;
|
||||
clocks = <&clkusb>;
|
||||
clock-names = "usb";
|
||||
interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
|
||||
ranges;
|
||||
dma-coherent;
|
||||
dma-ranges;
|
||||
status = "disabled";
|
||||
|
||||
dwc3@2690000 {
|
||||
compatible = "synopsys,dwc3";
|
||||
reg = <0x2690000 0x70000>;
|
||||
interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
|
||||
usb-phy = <&usb_phy>, <&usb_phy>;
|
||||
};
|
||||
};
|
||||
|
||||
wdt: wdt@022f0080 {
|
||||
compatible = "ti,keystone-wdt","ti,davinci-wdt";
|
||||
reg = <0x022f0080 0x80>;
|
||||
clocks = <&clkwdtimer0>;
|
||||
};
|
||||
|
||||
clock_event: timer@22f0000 {
|
||||
compatible = "ti,keystone-timer";
|
||||
reg = <0x022f0000 0x80>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&clktimer15>;
|
||||
};
|
||||
|
||||
gpio0: gpio@260bf00 {
|
||||
compatible = "ti,keystone-gpio";
|
||||
reg = <0x0260bf00 0x100>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
/* HW Interrupts mapped to GPIO pins */
|
||||
interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&clkgpio>;
|
||||
clock-names = "gpio";
|
||||
ti,ngpio = <32>;
|
||||
ti,davinci-gpio-unbanked = <32>;
|
||||
};
|
||||
|
||||
aemif: aemif@21000A00 {
|
||||
compatible = "ti,keystone-aemif", "ti,davinci-aemif";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
clocks = <&clkaemif>;
|
||||
clock-names = "aemif";
|
||||
clock-ranges;
|
||||
|
||||
reg = <0x21000A00 0x00000100>;
|
||||
ranges = <0 0 0x30000000 0x10000000
|
||||
1 0 0x21000A00 0x00000100>;
|
||||
};
|
||||
|
||||
kirq0: keystone_irq@26202a0 {
|
||||
compatible = "ti,keystone-irq";
|
||||
interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
ti,syscon-dev = <&devctrl 0x2a0>;
|
||||
};
|
||||
|
||||
pcie0: pcie@21800000 {
|
||||
compatible = "ti,keystone-pcie", "snps,dw-pcie";
|
||||
clocks = <&clkpcie>;
|
||||
clock-names = "pcie";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
reg = <0x21801000 0x2000>, <0x21800000 0x1000>, <0x02620128 4>;
|
||||
ranges = <0x81000000 0 0 0x23250000 0 0x4000
|
||||
0x82000000 0 0x50000000 0x50000000 0 0x10000000>;
|
||||
|
||||
status = "disabled";
|
||||
device_type = "pci";
|
||||
num-lanes = <2>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc0 0>, /* INT A */
|
||||
<0 0 0 2 &pcie_intc0 1>, /* INT B */
|
||||
<0 0 0 3 &pcie_intc0 2>, /* INT C */
|
||||
<0 0 0 4 &pcie_intc0 3>; /* INT D */
|
||||
|
||||
pcie_msi_intc0: msi-interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 31 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 33 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 34 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 37 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
|
||||
pcie_intc0: legacy-interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 27 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 28 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
Reference in a new issue