mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-26 22:52:18 +00:00
rockchip: dts: rk3328: add rk3328-rock64.dts
rk3328-rock64.dts has been taken from Linux kernel commit
cff6d1d6f88b ("arm64: dts: rockchip: enable HS200 for eMMC on rock64")
with minor modifications (drop nodes not known by rk3328.dtsi).
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Matwey V. Kornilov
Kever Yang
parent
c009aeb8ca
commit
348a0b7f9e
3 changed files with 330 additions and 1 deletions
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@ -93,7 +93,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3288) += \
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rk3288-vyasa.dtb
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dtb-$(CONFIG_ROCKCHIP_RK3328) += \
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rk3328-evb.dtb
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rk3328-evb.dtb \
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rk3328-rock64.dtb
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dtb-$(CONFIG_ROCKCHIP_RK3368) += \
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rk3368-lion.dtb \
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34
arch/arm/dts/rk3328-rock64-u-boot.dtsi
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34
arch/arm/dts/rk3328-rock64-u-boot.dtsi
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@ -0,0 +1,34 @@
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/*
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* (C) Copyright 2018 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/ {
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aliases {
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mmc0 = &emmc;
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mmc1 = &sdmmc;
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};
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chosen {
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u-boot,spl-boot-order = &emmc, &sdmmc;
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};
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};
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&cru {
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u-boot,dm-pre-reloc;
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};
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&uart2 {
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u-boot,dm-pre-reloc;
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};
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&emmc {
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u-boot,dm-pre-reloc;
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fifo-mode;
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};
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&sdmmc {
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u-boot,dm-pre-reloc;
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fifo-mode;
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};
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294
arch/arm/dts/rk3328-rock64.dts
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294
arch/arm/dts/rk3328-rock64.dts
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@ -0,0 +1,294 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2017 PINE64
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*/
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/dts-v1/;
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#include "rk3328.dtsi"
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/ {
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model = "Pine64 Rock64";
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compatible = "pine64,rock64", "rockchip,rk3328";
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chosen {
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stdout-path = "serial2:1500000n8";
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};
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gmac_clkin: external-gmac-clock {
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "gmac_clkin";
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#clock-cells = <0>;
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};
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vcc_sd: sdmmc-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc0m1_gpio>;
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regulator-name = "vcc_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_io>;
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};
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vcc_host_5v: vcc-host-5v-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb30_host_drv>;
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regulator-name = "vcc_host_5v";
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vcc_sys>;
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};
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vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb20_host_drv>;
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regulator-name = "vcc_host1_5v";
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vcc_sys>;
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};
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vcc_sys: vcc-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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};
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&cpu0 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu1 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu2 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu3 {
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cpu-supply = <&vdd_arm>;
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};
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&emmc {
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bus-width = <8>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
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vmmc-supply = <&vcc_io>;
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vqmmc-supply = <&vcc18_emmc>;
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status = "okay";
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};
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&gmac2io {
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assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
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assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
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clock_in_out = "input";
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phy-supply = <&vcc_io>;
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phy-mode = "rgmii";
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pinctrl-names = "default";
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pinctrl-0 = <&rgmiim1_pins>;
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snps,force_thresh_dma_mode;
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snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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snps,reset-delays-us = <0 10000 50000>;
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tx_delay = <0x24>;
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rx_delay = <0x18>;
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status = "okay";
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};
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&i2c1 {
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status = "okay";
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rk805: rk805@18 {
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compatible = "rockchip,rk805";
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reg = <0x18>;
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interrupt-parent = <&gpio2>;
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interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
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#clock-cells = <1>;
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clock-output-names = "xin32k", "rk805-clkout2";
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l>;
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rockchip,system-power-controller;
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wakeup-source;
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vcc1-supply = <&vcc_sys>;
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vcc2-supply = <&vcc_sys>;
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vcc3-supply = <&vcc_sys>;
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vcc4-supply = <&vcc_sys>;
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vcc5-supply = <&vcc_io>;
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vcc6-supply = <&vcc_sys>;
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regulators {
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vdd_logic: DCDC_REG1 {
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regulator-name = "vdd_logic";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-ramp-delay = <12500>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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vdd_arm: DCDC_REG2 {
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-ramp-delay = <12500>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <950000>;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-name = "vcc_ddr";
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vcc_io: DCDC_REG4 {
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regulator-name = "vcc_io";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcc_18: LDO_REG1 {
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regulator-name = "vdd_18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc18_emmc: LDO_REG2 {
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regulator-name = "vcc_18emmc";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vdd_10: LDO_REG3 {
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regulator-name = "vdd_10";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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};
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};
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};
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&io_domains {
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status = "okay";
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vccio1-supply = <&vcc_io>;
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vccio2-supply = <&vcc18_emmc>;
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vccio3-supply = <&vcc_io>;
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vccio4-supply = <&vcc_18>;
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vccio5-supply = <&vcc_io>;
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vccio6-supply = <&vcc_io>;
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pmuio-supply = <&vcc_io>;
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};
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&pinctrl {
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pmic {
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pmic_int_l: pmic-int-l {
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rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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usb2 {
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usb20_host_drv: usb20-host-drv {
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rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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usb3 {
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usb30_host_drv: usb30-host-drv {
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rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&sdmmc {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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disable-wp;
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max-frequency = <150000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
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vmmc-supply = <&vcc_sd>;
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status = "okay";
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};
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&spi0 {
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status = "okay";
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spiflash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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/* maximum speed for Rockchip SPI */
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spi-max-frequency = <50000000>;
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};
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};
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&uart2 {
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status = "okay";
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};
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&usb20_otg {
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dr_mode = "host";
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status = "okay";
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};
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&usb_host0_ehci {
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status = "okay";
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};
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&usb_host0_ohci {
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status = "okay";
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};
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