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https://github.com/AsahiLinux/u-boot
synced 2024-11-11 07:34:31 +00:00
Merge branch 'master' of git://git.denx.de/u-boot-i2c
This commit is contained in:
commit
3364b1898c
2 changed files with 77 additions and 2 deletions
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@ -46,10 +46,16 @@
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DECLARE_GLOBAL_DATA_PTR;
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static const struct fsl_i2c *i2c_dev[2] = {
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static const struct fsl_i2c *i2c_dev[4] = {
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(struct fsl_i2c *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C_OFFSET),
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#ifdef CONFIG_SYS_FSL_I2C2_OFFSET
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(struct fsl_i2c *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C2_OFFSET)
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(struct fsl_i2c *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C2_OFFSET),
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#endif
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#ifdef CONFIG_SYS_FSL_I2C3_OFFSET
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(struct fsl_i2c *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C3_OFFSET),
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#endif
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#ifdef CONFIG_SYS_FSL_I2C4_OFFSET
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(struct fsl_i2c *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C4_OFFSET)
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#endif
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};
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@ -539,3 +545,15 @@ U_BOOT_I2C_ADAP_COMPLETE(fsl_1, fsl_i2c_init, fsl_i2c_probe, fsl_i2c_read,
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CONFIG_SYS_FSL_I2C2_SPEED, CONFIG_SYS_FSL_I2C2_SLAVE,
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1)
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#endif
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#ifdef CONFIG_SYS_FSL_I2C3_OFFSET
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U_BOOT_I2C_ADAP_COMPLETE(fsl_2, fsl_i2c_init, fsl_i2c_probe, fsl_i2c_read,
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fsl_i2c_write, fsl_i2c_set_bus_speed,
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CONFIG_SYS_FSL_I2C3_SPEED, CONFIG_SYS_FSL_I2C3_SLAVE,
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2)
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#endif
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#ifdef CONFIG_SYS_FSL_I2C4_OFFSET
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U_BOOT_I2C_ADAP_COMPLETE(fsl_3, fsl_i2c_init, fsl_i2c_probe, fsl_i2c_read,
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fsl_i2c_write, fsl_i2c_set_bus_speed,
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CONFIG_SYS_FSL_I2C4_SPEED, CONFIG_SYS_FSL_I2C4_SLAVE,
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3)
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#endif
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@ -153,11 +153,60 @@ static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
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return 0;
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}
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static void omap24_i2c_deblock(struct i2c_adapter *adap)
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{
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struct i2c *i2c_base = omap24_get_base(adap);
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int i;
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u16 systest;
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u16 orgsystest;
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/* set test mode ST_EN = 1 */
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orgsystest = readw(&i2c_base->systest);
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systest = orgsystest;
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/* enable testmode */
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systest |= I2C_SYSTEST_ST_EN;
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writew(systest, &i2c_base->systest);
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systest &= ~I2C_SYSTEST_TMODE_MASK;
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systest |= 3 << I2C_SYSTEST_TMODE_SHIFT;
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writew(systest, &i2c_base->systest);
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/* set SCL, SDA = 1 */
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systest |= I2C_SYSTEST_SCL_O | I2C_SYSTEST_SDA_O;
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writew(systest, &i2c_base->systest);
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udelay(10);
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/* toggle scl 9 clocks */
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for (i = 0; i < 9; i++) {
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/* SCL = 0 */
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systest &= ~I2C_SYSTEST_SCL_O;
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writew(systest, &i2c_base->systest);
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udelay(10);
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/* SCL = 1 */
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systest |= I2C_SYSTEST_SCL_O;
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writew(systest, &i2c_base->systest);
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udelay(10);
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}
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/* send stop */
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systest &= ~I2C_SYSTEST_SDA_O;
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writew(systest, &i2c_base->systest);
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udelay(10);
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systest |= I2C_SYSTEST_SCL_O | I2C_SYSTEST_SDA_O;
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writew(systest, &i2c_base->systest);
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udelay(10);
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/* restore original mode */
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writew(orgsystest, &i2c_base->systest);
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}
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static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
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{
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struct i2c *i2c_base = omap24_get_base(adap);
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int timeout = I2C_TIMEOUT;
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int deblock = 1;
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retry:
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if (readw(&i2c_base->con) & I2C_CON_EN) {
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writew(0, &i2c_base->con);
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udelay(50000);
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@ -194,6 +243,14 @@ static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
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udelay(1000);
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flush_fifo(adap);
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writew(0xFFFF, &i2c_base->stat);
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/* Handle possible failed I2C state */
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if (wait_for_bb(adap))
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if (deblock == 1) {
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omap24_i2c_deblock(adap);
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deblock = 0;
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goto retry;
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}
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}
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static void flush_fifo(struct i2c_adapter *adap)
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