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ARM: dts: Add missing DT for Meson G12A support
The following DT nodes in the process on review for Linux 5.3, until Linux 5.3 is tagged, add the missing DT nodes in u-boot specific DTSI files that will be dropped when the v5.3-rc1 DT is synced again. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Neil Armstrong
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2 changed files with 279 additions and 0 deletions
216
arch/arm/dts/meson-g12a-u-boot.dtsi
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216
arch/arm/dts/meson-g12a-u-boot.dtsi
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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/ {
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soc {
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ethmac: ethernet@ff3f0000 {
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compatible = "amlogic,meson-axg-dwmac", "snps,dwmac-3.710",
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"snps,dwmac";
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reg = <0x0 0xff3f0000 0x0 0x10000
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0x0 0xff634540 0x0 0x8>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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clocks = <&clkc CLKID_ETH>,
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<&clkc CLKID_FCLK_DIV2>,
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<&clkc CLKID_MPLL2>;
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clock-names = "stmmaceth", "clkin0", "clkin1";
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status = "disabled";
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mdio0: mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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};
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};
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sd_emmc_a: sd@ffe03000 {
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compatible = "amlogic,meson-axg-mmc";
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reg = <0x0 0xffe03000 0x0 0x800>;
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interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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clocks = <&clkc CLKID_SD_EMMC_A>,
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<&clkc CLKID_SD_EMMC_A_CLK0>,
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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "core", "clkin0", "clkin1";
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resets = <&reset RESET_SD_EMMC_A>;
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};
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sd_emmc_b: sd@ffe05000 {
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compatible = "amlogic,meson-axg-mmc";
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reg = <0x0 0xffe05000 0x0 0x800>;
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interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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clocks = <&clkc CLKID_SD_EMMC_B>,
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<&clkc CLKID_SD_EMMC_B_CLK0>,
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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "core", "clkin0", "clkin1";
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resets = <&reset RESET_SD_EMMC_B>;
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};
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sd_emmc_c: mmc@ffe07000 {
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compatible = "amlogic,meson-axg-mmc";
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reg = <0x0 0xffe07000 0x0 0x800>;
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interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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clocks = <&clkc CLKID_SD_EMMC_C>,
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<&clkc CLKID_SD_EMMC_C_CLK0>,
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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "core", "clkin0", "clkin1";
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resets = <&reset RESET_SD_EMMC_C>;
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};
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};
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};
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&periphs_pinctrl {
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emmc_pins: emmc {
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mux {
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groups = "emmc_nand_d0",
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"emmc_nand_d1",
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"emmc_nand_d2",
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"emmc_nand_d3",
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"emmc_nand_d4",
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"emmc_nand_d5",
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"emmc_nand_d6",
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"emmc_nand_d7",
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"emmc_clk",
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"emmc_cmd";
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function = "emmc";
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bias-pull-up;
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};
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};
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emmc_ds_pins: emmc-ds {
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mux {
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groups = "emmc_nand_ds";
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function = "emmc";
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bias-pull-down;
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};
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};
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emmc_clk_gate_pins: emmc_clk_gate {
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mux {
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groups = "BOOT_8";
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function = "gpio_periphs";
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bias-pull-down;
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};
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};
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eth_leds_pins: eth-leds {
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mux {
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groups = "eth_link_led",
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"eth_act_led";
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function = "eth";
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bias-disable;
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};
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};
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eth_rmii_pins: eth-rmii {
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mux {
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groups = "eth_mdio",
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"eth_mdc",
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"eth_rgmii_rx_clk",
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"eth_rx_dv",
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"eth_rxd0",
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"eth_rxd1",
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"eth_txen",
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"eth_txd0",
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"eth_txd1";
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function = "eth";
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bias-disable;
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};
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};
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eth_rgmii_pins: eth-rgmii {
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mux {
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groups = "eth_rxd2_rgmii",
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"eth_rxd3_rgmii",
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"eth_rgmii_tx_clk",
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"eth_txd2_rgmii",
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"eth_txd3_rgmii";
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function = "eth";
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bias-disable;
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};
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};
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sdcard_c_pins: sdcard_c {
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mux {
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groups = "sdcard_d0_c",
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"sdcard_d1_c",
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"sdcard_d2_c",
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"sdcard_d3_c",
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"sdcard_cmd_c",
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"sdcard_clk_c";
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function = "sdcard";
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bias-pull-up;
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};
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};
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sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
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mux {
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groups = "GPIOC_4";
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function = "gpio_periphs";
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bias-pull-down;
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};
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};
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sdcard_z_pins: sdcard_z {
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mux {
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groups = "sdcard_d0_z",
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"sdcard_d1_z",
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"sdcard_d2_z",
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"sdcard_d3_z",
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"sdcard_cmd_z",
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"sdcard_clk_z";
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function = "sdcard";
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bias-pull-up;
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};
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};
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sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
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mux {
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groups = "GPIOZ_6";
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function = "gpio_periphs";
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bias-pull-down;
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};
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};
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};
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&periphs {
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eth_phy: mdio-multiplexer@4c000 {
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compatible = "amlogic,g12a-mdio-mux";
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reg = <0x0 0x4c000 0x0 0xa4>;
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clocks = <&clkc CLKID_ETH_PHY>,
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<&xtal>,
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<&clkc CLKID_MPLL_5OM>;
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clock-names = "pclk", "clkin0", "clkin1";
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mdio-parent-bus = <&mdio0>;
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#address-cells = <1>;
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#size-cells = <0>;
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ext_mdio: mdio@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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int_mdio: mdio@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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internal_ephy: ethernet_phy@8 {
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compatible = "ethernet-phy-id0180.3300",
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"ethernet-phy-ieee802.3-c22";
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reg = <8>;
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max-speed = <100>;
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/* FIXME: Add irq support */
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};
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};
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};
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};
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63
arch/arm/dts/meson-g12a-u200-u-boot.dtsi
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63
arch/arm/dts/meson-g12a-u200-u-boot.dtsi
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@ -0,0 +1,63 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include "meson-g12a-u-boot.dtsi"
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/ {
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aliases {
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ethernet0 = ðmac;
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};
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emmc_pwrseq: emmc-pwrseq {
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compatible = "mmc-pwrseq-emmc";
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reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
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};
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};
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ðmac {
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status = "okay";
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pinctrl-0 = <ð_leds_pins>;
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pinctrl-names = "default";
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phy-handle = <&internal_ephy>;
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phy-mode = "rmii";
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};
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/* SD card */
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&sd_emmc_b {
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status = "okay";
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pinctrl-0 = <&sdcard_c_pins>;
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pinctrl-1 = <&sdcard_clk_gate_c_pins>;
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pinctrl-names = "default", "clk-gate";
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bus-width = <4>;
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cap-sd-highspeed;
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max-frequency = <50000000>;
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disable-wp;
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cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
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vmmc-supply = <&vddao_3v3>;
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vqmmc-supply = <&vddao_3v3>;
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};
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/* eMMC */
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&sd_emmc_c {
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status = "okay";
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pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
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pinctrl-1 = <&emmc_clk_gate_pins>;
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pinctrl-names = "default", "clk-gate";
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bus-width = <8>;
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cap-mmc-highspeed;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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max-frequency = <200000000>;
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disable-wp;
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mmc-pwrseq = <&emmc_pwrseq>;
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vmmc-supply = <&vcc_3v3>;
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vqmmc-supply = <&flash_1v8>;
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};
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