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drivers: use devfdt_get_addr_index_ptr when cast to pointer

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The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_index_ptr instead of the devfdt_get_addr_index function
in the various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Johan Jonker 2023-03-13 01:32:31 +01:00 committed by Kever Yang
parent 842fb5de42
commit 320a1938b6
10 changed files with 33 additions and 33 deletions
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4
drivers/clk/clk-hsdk-cgu.c
View file

@ -753,11 +753,11 @@ static int hsdk_cgu_clk_probe(struct udevice *dev)
else else
hsdk_clk->map = hsdk_4xd_clk_map; hsdk_clk->map = hsdk_4xd_clk_map;
hsdk_clk->cgu_regs = (void __iomem *)devfdt_get_addr_index(dev, 0); hsdk_clk->cgu_regs = devfdt_get_addr_index_ptr(dev, 0);
if (!hsdk_clk->cgu_regs) if (!hsdk_clk->cgu_regs)
return -EINVAL; return -EINVAL;
hsdk_clk->creg_regs = (void __iomem *)devfdt_get_addr_index(dev, 1); hsdk_clk->creg_regs = devfdt_get_addr_index_ptr(dev, 1);
if (!hsdk_clk->creg_regs) if (!hsdk_clk->creg_regs)
return -EINVAL; return -EINVAL;

4
drivers/ddr/altera/sdram_gen5.c
View file

@ -567,9 +567,9 @@ static int altera_gen5_sdram_of_to_plat(struct udevice *dev)
{ {
struct altera_gen5_sdram_plat *plat = dev_get_plat(dev); struct altera_gen5_sdram_plat *plat = dev_get_plat(dev);
plat->sdr = (struct socfpga_sdr *)devfdt_get_addr_index(dev, 0); plat->sdr = devfdt_get_addr_index_ptr(dev, 0);
if (!plat->sdr) if (!plat->sdr)
return -ENODEV; return -EINVAL;
return 0; return 0;
} }

2
drivers/mmc/xenon_sdhci.c
View file

@ -537,7 +537,7 @@ static int xenon_sdhci_of_to_plat(struct udevice *dev)
host->ioaddr = dev_read_addr_ptr(dev); host->ioaddr = dev_read_addr_ptr(dev);
if (device_is_compatible(dev, "marvell,armada-3700-sdhci")) if (device_is_compatible(dev, "marvell,armada-3700-sdhci"))
priv->pad_ctrl_reg = (void *)devfdt_get_addr_index(dev, 1); priv->pad_ctrl_reg = devfdt_get_addr_index_ptr(dev, 1);
name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "marvell,pad-type", name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "marvell,pad-type",
NULL); NULL);

24
drivers/net/mvpp2.c
View file

@ -5300,18 +5300,18 @@ static int mvpp2_base_probe(struct udevice *dev)
} }
/* Save base addresses for later use */ /* Save base addresses for later use */
priv->base = (void *)devfdt_get_addr_index(dev, 0); priv->base = devfdt_get_addr_index_ptr(dev, 0);
if (IS_ERR(priv->base)) if (!priv->base)
return PTR_ERR(priv->base); return -EINVAL;
if (priv->hw_version == MVPP21) { if (priv->hw_version == MVPP21) {
priv->lms_base = (void *)devfdt_get_addr_index(dev, 1); priv->lms_base = devfdt_get_addr_index_ptr(dev, 1);
if (IS_ERR(priv->lms_base)) if (!priv->lms_base)
return PTR_ERR(priv->lms_base); return -EINVAL;
} else { } else {
priv->iface_base = (void *)devfdt_get_addr_index(dev, 1); priv->iface_base = devfdt_get_addr_index_ptr(dev, 1);
if (IS_ERR(priv->iface_base)) if (!priv->iface_base)
return PTR_ERR(priv->iface_base); return -EINVAL;
/* Store common base addresses for all ports */ /* Store common base addresses for all ports */
priv->mpcs_base = priv->iface_base + MVPP22_MPCS; priv->mpcs_base = priv->iface_base + MVPP22_MPCS;
@ -5350,10 +5350,10 @@ static int mvpp2_probe(struct udevice *dev)
if (priv->hw_version == MVPP21) { if (priv->hw_version == MVPP21) {
int priv_common_regs_num = 2; int priv_common_regs_num = 2;
port->base = (void __iomem *)devfdt_get_addr_index( port->base = devfdt_get_addr_index_ptr(
dev->parent, priv_common_regs_num + port->id); dev->parent, priv_common_regs_num + port->id);
if (IS_ERR(port->base)) if (!port->base)
return PTR_ERR(port->base); return -EINVAL;
} else { } else {
port->gop_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), port->gop_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"gop-port-id", -1); "gop-port-id", -1);

4
drivers/pci/pcie_dw_mvebu.c
View file

@ -564,8 +564,8 @@ static int pcie_dw_mvebu_of_to_plat(struct udevice *dev)
struct pcie_dw_mvebu *pcie = dev_get_priv(dev); struct pcie_dw_mvebu *pcie = dev_get_priv(dev);
/* Get the controller base address */ /* Get the controller base address */
pcie->ctrl_base = (void *)devfdt_get_addr_index(dev, 0); pcie->ctrl_base = devfdt_get_addr_index_ptr(dev, 0);
if ((fdt_addr_t)pcie->ctrl_base == FDT_ADDR_T_NONE) if (!pcie->ctrl_base)
return -EINVAL; return -EINVAL;
/* Get the config space base address and size */ /* Get the config space base address and size */

4
drivers/pci/pcie_imx.c
View file

@ -751,8 +751,8 @@ static int imx_pcie_of_to_plat(struct udevice *dev)
{ {
struct imx_pcie_priv *priv = dev_get_priv(dev); struct imx_pcie_priv *priv = dev_get_priv(dev);
priv->dbi_base = (void __iomem *)devfdt_get_addr_index(dev, 0); priv->dbi_base = devfdt_get_addr_index_ptr(dev, 0);
priv->cfg_base = (void __iomem *)devfdt_get_addr_index(dev, 1); priv->cfg_base = devfdt_get_addr_index_ptr(dev, 1);
if (!priv->dbi_base || !priv->cfg_base) if (!priv->dbi_base || !priv->cfg_base)
return -EINVAL; return -EINVAL;

8
drivers/pci/pcie_layerscape_ep.c
View file

@ -250,13 +250,13 @@ static int ls_pcie_ep_probe(struct udevice *dev)
pcie_ep->pcie = pcie; pcie_ep->pcie = pcie;
pcie->dbi = (void __iomem *)devfdt_get_addr_index(dev, 0); pcie->dbi = devfdt_get_addr_index_ptr(dev, 0);
if (!pcie->dbi) if (!pcie->dbi)
return -ENOMEM; return -EINVAL;
pcie->ctrl = (void __iomem *)devfdt_get_addr_index(dev, 1); pcie->ctrl = devfdt_get_addr_index_ptr(dev, 1);
if (!pcie->ctrl) if (!pcie->ctrl)
return -ENOMEM; return -EINVAL;
ret = fdt_get_named_resource(gd->fdt_blob, dev_of_offset(dev), ret = fdt_get_named_resource(gd->fdt_blob, dev_of_offset(dev),
"reg", "reg-names", "reg", "reg-names",

12
drivers/phy/marvell/comphy_core.c
View file

@ -88,13 +88,13 @@ static int comphy_probe(struct udevice *dev)
int res; int res;
/* Save base addresses for later use */ /* Save base addresses for later use */
chip_cfg->comphy_base_addr = (void *)devfdt_get_addr_index(dev, 0); chip_cfg->comphy_base_addr = devfdt_get_addr_index_ptr(dev, 0);
if (IS_ERR(chip_cfg->comphy_base_addr)) if (!chip_cfg->comphy_base_addr)
return PTR_ERR(chip_cfg->comphy_base_addr); return -EINVAL;
chip_cfg->hpipe3_base_addr = (void *)devfdt_get_addr_index(dev, 1); chip_cfg->hpipe3_base_addr = devfdt_get_addr_index_ptr(dev, 1);
if (IS_ERR(chip_cfg->hpipe3_base_addr)) if (!chip_cfg->hpipe3_base_addr)
return PTR_ERR(chip_cfg->hpipe3_base_addr); return -EINVAL;
if (device_is_compatible(dev, "marvell,comphy-a3700")) { if (device_is_compatible(dev, "marvell,comphy-a3700")) {
chip_cfg->comphy_init_map = comphy_a3700_init_serdes_map; chip_cfg->comphy_init_map = comphy_a3700_init_serdes_map;

2
drivers/spi/cadence_qspi.c
View file

@ -389,7 +389,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus)
struct cadence_spi_priv *priv = dev_get_priv(bus); struct cadence_spi_priv *priv = dev_get_priv(bus);
ofnode subnode; ofnode subnode;
plat->regbase = (void *)devfdt_get_addr_index(bus, 0); plat->regbase = devfdt_get_addr_index_ptr(bus, 0);
plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahbsize); plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahbsize);
plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs"); plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs");
plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128); plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128);

2
drivers/usb/musb-new/ti-musb.c
View file

@ -88,7 +88,7 @@ static int ti_musb_of_to_plat(struct udevice *dev)
int usb_index; int usb_index;
struct musb_hdrc_config *musb_config; struct musb_hdrc_config *musb_config;
plat->base = (void *)devfdt_get_addr_index(dev, 1); plat->base = devfdt_get_addr_index_ptr(dev, 1);
phys = fdtdec_lookup_phandle(fdt, node, "phys"); phys = fdtdec_lookup_phandle(fdt, node, "phys");
ctrl_mod = fdtdec_lookup_phandle(fdt, phys, "ti,ctrl_mod"); ctrl_mod = fdtdec_lookup_phandle(fdt, phys, "ti,ctrl_mod");