Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-10 23:24:38 +00:00
Code Issues Projects Releases Packages Wiki Activity

pci: Add functions to update PCI configuration registers

Browse source 
It is common to read a config register value, clear and set some bits, then
write back the updated value. Add functions to do this in one step, for
convenience.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Simon Glass 2016-03-06 19:27:52 -07:00 committed by Bin Meng
parent 17c43f1a42
commit 319dba1f4d
2 changed files with 80 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

57
drivers/pci/pci-uclass.c
View file

@ -250,6 +250,21 @@ int pci_bus_write_config(struct udevice *bus, pci_dev_t bdf, int offset,
return ops->write_config(bus, bdf, offset, value, size);
}
int pci_bus_clrset_config32(struct udevice *bus, pci_dev_t bdf, int offset,
u32 clr, u32 set)
{
ulong val;
int ret;
ret = pci_bus_read_config(bus, bdf, offset, &val, PCI_SIZE_32);
if (ret)
return ret;
val &= ~clr;
val |= set;
return pci_bus_write_config(bus, bdf, offset, val, PCI_SIZE_32);
}
int pci_write_config(pci_dev_t bdf, int offset, unsigned long value,
enum pci_size_t size)
{
@ -418,6 +433,48 @@ int dm_pci_read_config32(struct udevice *dev, int offset, u32 *valuep)
return 0;
}
int dm_pci_clrset_config8(struct udevice *dev, int offset, u32 clr, u32 set)
{
u8 val;
int ret;
ret = dm_pci_read_config8(dev, offset, &val);
if (ret)
return ret;
val &= ~clr;
val |= set;
return dm_pci_write_config8(dev, offset, val);
}
int dm_pci_clrset_config16(struct udevice *dev, int offset, u32 clr, u32 set)
{
u16 val;
int ret;
ret = dm_pci_read_config16(dev, offset, &val);
if (ret)
return ret;
val &= ~clr;
val |= set;
return dm_pci_write_config16(dev, offset, val);
}
int dm_pci_clrset_config32(struct udevice *dev, int offset, u32 clr, u32 set)
{
u32 val;
int ret;
ret = dm_pci_read_config32(dev, offset, &val);
if (ret)
return ret;
val &= ~clr;
val |= set;
return dm_pci_write_config32(dev, offset, val);
}
static void set_vga_bridge_bits(struct udevice *dev)
{
struct udevice *parent = dev->parent;

23
include/pci.h
View file

@ -1026,6 +1026,21 @@ int pci_bus_read_config(struct udevice *bus, pci_dev_t bdf, int offset,
int pci_bus_write_config(struct udevice *bus, pci_dev_t bdf, int offset,
unsigned long value, enum pci_size_t size);
/**
* pci_bus_clrset_config32() - Update a configuration value for a device
*
* The register at @offset is updated to (oldvalue & ~clr) | set.
*
* @bus: Bus to access
* @bdf: PCI device address: bus, device and function -see PCI_BDF()
* @offset: Register offset to update
* @clr: Bits to clear
* @set: Bits to set
* @return 0 if OK, -ve on error
*/
int pci_bus_clrset_config32(struct udevice *bus, pci_dev_t bdf, int offset,
u32 clr, u32 set);
/**
* Driver model PCI config access functions. Use these in preference to others
* when you have a valid device
@ -1044,6 +1059,14 @@ int dm_pci_write_config8(struct udevice *dev, int offset, u8 value);
int dm_pci_write_config16(struct udevice *dev, int offset, u16 value);
int dm_pci_write_config32(struct udevice *dev, int offset, u32 value);
/**
* These permit convenient read/modify/write on PCI configuration. The
* register is updated to (oldvalue & ~clr) | set.
*/
int dm_pci_clrset_config8(struct udevice *dev, int offset, u32 clr, u32 set);
int dm_pci_clrset_config16(struct udevice *dev, int offset, u32 clr, u32 set);
int dm_pci_clrset_config32(struct udevice *dev, int offset, u32 clr, u32 set);
/*
* The following functions provide access to the above without needing the
* size parameter. We are trying to encourage the use of the 8/16/32-style