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board/t104xrdb: Conditional workaround of errata A-008044

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Workaround of Errata A-008044 was implemented without errata number and it is
enabled by default. Errata A-008044 is only valid for T1040 Rev 1.0.

So put errata number and make it conditional.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Prabhakar Kushwaha 2014-10-29 22:33:55 +05:30 committed by York Sun
parent 9f074e67f5
commit 31530e0b8a
2 changed files with 16 additions and 9 deletions
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3
arch/powerpc/cpu/mpc85xx/cmd_errata.c
View file

@ -315,7 +315,8 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
#endif
#if defined(CONFIG_SYS_FSL_ERRATUM_A008044) && \
defined(CONFIG_A008044_WORKAROUND)
puts("Work-around for Erratum A-008044 enabled\n");
if (IS_SVR_REV(svr, 1, 0))
puts("Work-around for Erratum A-008044 enabled\n");
#endif
return 0;
}

22
board/freescale/t104xrdb/spl.c
View file

@ -36,18 +36,24 @@ void board_init_f(ulong bootflag)
u32 plat_ratio, sys_clk, uart_clk;
#if defined(CONFIG_SPL_NAND_BOOT) && defined(CONFIG_A008044_WORKAROUND)
u32 porsr1, pinctl;
u32 svr = get_svr();
#endif
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
#if defined(CONFIG_SPL_NAND_BOOT) && defined(CONFIG_A008044_WORKAROUND)
/*
* There is T1040 SoC issue where NOR, FPGA are inaccessible during
* NAND boot because IFC signals > IFC_AD7 are not enabled.
* This workaround changes RCW source to make all signals enabled.
*/
porsr1 = in_be32(&gur->porsr1);
pinctl = ((porsr1 & ~(FSL_CORENET_CCSR_PORSR1_RCW_MASK)) | 0x24800000);
out_be32((unsigned int *)(CONFIG_SYS_DCSRBAR + 0x20000), pinctl);
if (IS_SVR_REV(svr, 1, 0)) {
/*
* There is T1040 SoC issue where NOR, FPGA are inaccessible
* during NAND boot because IFC signals > IFC_AD7 are not
* enabled. This workaround changes RCW source to make all
* signals enabled.
*/
porsr1 = in_be32(&gur->porsr1);
pinctl = ((porsr1 & ~(FSL_CORENET_CCSR_PORSR1_RCW_MASK))
| 0x24800000);
out_be32((unsigned int *)(CONFIG_SYS_DCSRBAR + 0x20000),
pinctl);
}
#endif
/* Memcpy existing GD at CONFIG_SPL_GD_ADDR */