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https://github.com/AsahiLinux/u-boot
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Finish conversion of CONFIG_SYS_CLK_FREQ to Kconfig
In order to finish moving this symbol to Kconfig for all platforms, we need to do a few more things. First, for all platforms that define this to a function, introduce CONFIG_DYNAMIC_SYS_CLK_FREQ, similar to CONFIG_DYNAMIC_DDR_CLK_FREQ and populate clock_legacy.h. This entails also switching all users from CONFIG_SYS_CLK_FREQ to get_board_sys_clk() and updating a few preprocessor tests. With that done, all platforms that define a value here can be converted to Kconfig, and a fall-back of zero is sufficiently safe to use (and what is used today in cases where code may or may not have this available). Make sure that code which calls this function includes <clock_legacy.h> to get the prototype. Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
parent
e4c3ce7e28
commit
2f8a6db5d8
208 changed files with 232 additions and 232 deletions
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@ -4,6 +4,7 @@
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*/
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#include <common.h>
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#include <clock_legacy.h>
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#include <init.h>
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#include <malloc.h>
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#include <vsprintf.h>
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@ -18,7 +19,7 @@ int arch_cpu_init(void)
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{
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timer_init();
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gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
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gd->cpu_clk = get_board_sys_clk();
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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cache_init();
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@ -6,12 +6,13 @@
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*/
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#include <common.h>
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#include <clock_legacy.h>
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#include <asm/arch/ep93xx.h>
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#include <asm/io.h>
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#include <div64.h>
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/*
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* CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL.
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* get_board_sys_clk() should be defined as the input frequency of the PLL.
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*
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* get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
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* the specified bus in HZ.
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@ -20,14 +21,14 @@
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/*
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* return the PLL output frequency
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*
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* PLL rate = CONFIG_SYS_CLK_FREQ * (X1FBD + 1) * (X2FBD + 1)
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* PLL rate = get_board_sys_clk() * (X1FBD + 1) * (X2FBD + 1)
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* / (X2IPD + 1) / 2^PS
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*/
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static ulong get_PLLCLK(uint32_t *pllreg)
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{
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uint8_t i;
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const uint32_t clkset = readl(pllreg);
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uint64_t rate = CONFIG_SYS_CLK_FREQ;
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uint64_t rate = get_board_sys_clk();
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rate *= ((clkset >> SYSCON_CLKSET_PLL_X1FBD1_SHIFT) & 0x1f) + 1;
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rate *= ((clkset >> SYSCON_CLKSET_PLL_X2FBD2_SHIFT) & 0x3f) + 1;
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do_div(rate, (clkset & 0x1f) + 1); /* X2IPD */
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@ -87,9 +88,9 @@ ulong get_UCLK(void)
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const uint32_t value = readl(&syscon->pwrcnt);
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if (value & SYSCON_PWRCNT_UART_BAUD)
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uclk_rate = CONFIG_SYS_CLK_FREQ;
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uclk_rate = get_board_sys_clk();
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else
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uclk_rate = CONFIG_SYS_CLK_FREQ / 2;
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uclk_rate = get_board_sys_clk() / 2;
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return uclk_rate;
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}
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@ -7,13 +7,14 @@
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#include <common.h>
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#if defined (CONFIG_IMX)
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#include <clock_legacy.h>
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#include <asm/arch/imx-regs.h>
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/* ------------------------------------------------------------------------- */
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/* NOTE: This describes the proper use of this file.
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*
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* CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL.
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* get_board_sys_clk() should be defined as the input frequency of the PLL.
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* SH FIXME: 16780000 in our case
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* get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
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* the specified bus in HZ.
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@ -45,7 +46,7 @@ ulong get_mcuPLLCLK(void)
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mfi = mfi<=5 ? 5 : mfi;
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return (2*(CONFIG_SYS_CLK_FREQ>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1);
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return (2*(get_board_sys_clk()>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1);
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}
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ulong get_FCLK(void)
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@ -39,7 +39,7 @@ void get_sys_info(struct sys_info *sys_info)
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uint i;
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uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS];
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uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS];
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unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
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unsigned long sysclk = get_board_sys_clk();
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sys_info->freq_systembus = sysclk;
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#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
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@ -131,9 +131,9 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
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sysclk_path = fdt_get_alias(blob, "sysclk");
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if (sysclk_path)
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do_fixup_by_path_u32(blob, sysclk_path, "clock-frequency",
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CONFIG_SYS_CLK_FREQ, 1);
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get_board_sys_clk(), 1);
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do_fixup_by_compat_u32(blob, "fsl,qoriq-sysclk-2.0",
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"clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
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"clock-frequency", get_board_sys_clk(), 1);
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#if defined(CONFIG_DEEP_SLEEP) && defined(CONFIG_SD_BOOT)
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#define UBOOT_HEAD_LEN 0x1000
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@ -5,6 +5,7 @@
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*/
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#include <common.h>
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#include <clock_legacy.h>
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#include <cpu_func.h>
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#include <env.h>
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#include <fsl_ddr_sdram.h>
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@ -161,7 +161,7 @@ void fsl_fdt_disable_usb(void *blob)
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* controller is used, SYSCLK must meet the additional requirement
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* of 100 MHz.
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*/
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if (CONFIG_SYS_CLK_FREQ != 100000000) {
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if (get_board_sys_clk() != 100000000) {
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off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
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while (off != -FDT_ERR_NOTFOUND) {
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fdt_status_disabled(blob, off);
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@ -655,7 +655,7 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
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#endif
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do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
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CONFIG_SYS_CLK_FREQ, 1);
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get_board_sys_clk(), 1);
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#ifdef CONFIG_GIC_V3_ITS
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ls_gic_rd_tables_init(blob);
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@ -52,12 +52,12 @@ void get_sys_info(struct sys_info *sys_info)
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uint i, cluster;
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uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS];
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uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS];
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unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
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unsigned long sysclk = get_board_sys_clk();
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unsigned long cluster_clk;
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sys_info->freq_systembus = sysclk;
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#ifndef CONFIG_CLUSTER_CLK_FREQ
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#define CONFIG_CLUSTER_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_CLUSTER_CLK_FREQ get_board_sys_clk()
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#endif
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cluster_clk = CONFIG_CLUSTER_CLK_FREQ;
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@ -72,7 +72,7 @@ void get_sys_info(struct sys_info *sys_info)
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#endif
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uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS];
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uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS];
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unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
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unsigned long sysclk = get_board_sys_clk();
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int cc_group[12] = CONFIG_SYS_FSL_CLUSTER_CLOCKS;
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u32 c_pll_sel, cplx_pll;
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void *offset;
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@ -4,6 +4,7 @@
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*/
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#include <common.h>
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#include <clock_legacy.h>
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#include <cpu_func.h>
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#include <image.h>
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#include <log.h>
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@ -5,6 +5,7 @@
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*/
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#include <common.h>
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#include <clock_legacy.h>
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#include <init.h>
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#include <asm/arch/hardware.h>
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#include <asm/global_data.h>
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@ -5,6 +5,7 @@
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*/
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#include <common.h>
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#include <clock_legacy.h>
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#include <log.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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@ -136,7 +137,7 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)
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/* SDIV [2:0] */
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s = r & 0x7;
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freq = CONFIG_SYS_CLK_FREQ;
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freq = get_board_sys_clk();
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if (pllreg == EPLL || pllreg == RPLL) {
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k = k & 0xffff;
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@ -1051,7 +1052,7 @@ static unsigned long exynos5800_get_lcd_clk(void)
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RPLL};
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sclk = get_pll_clk(reg_map[sel]);
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} else
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sclk = CONFIG_SYS_CLK_FREQ;
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sclk = get_board_sys_clk();
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/*
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* CLK_DIV_DISP10
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* FIMD1_RATIO [3:0]
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@ -9,6 +9,7 @@
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*/
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#ifndef CONFIG_TIMER
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#include <common.h>
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#include <clock_legacy.h>
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#include <init.h>
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#include <irq_func.h>
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#include <log.h>
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@ -76,7 +77,7 @@ void reset_timer_masked(void)
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lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
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#else
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lastdec = readl(&tmr->timer3_counter) /
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(CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
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(get_board_sys_clk() / 2 / CONFIG_SYS_HZ);
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#endif
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timestamp = 0; /* start "advancing" time stamp from 0 */
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@ -101,7 +102,7 @@ ulong get_timer_masked(void)
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ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
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#else
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ulong now = readl(&tmr->timer3_counter) /
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(CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
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(get_board_sys_clk() / 2 / CONFIG_SYS_HZ);
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#endif
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debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec);
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@ -155,7 +156,7 @@ void __udelay(unsigned long usec)
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#ifdef CONFIG_FTTMR010_EXT_CLK
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long tmo = usec * (TIMER_CLOCK / 1000) / 1000;
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#else
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long tmo = usec * ((CONFIG_SYS_CLK_FREQ / 2) / 1000) / 1000;
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long tmo = usec * ((get_board_sys_clk() / 2) / 1000) / 1000;
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#endif
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unsigned long now, last = readl(&tmr->timer3_counter);
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@ -190,7 +191,7 @@ ulong get_tbclk(void)
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#ifdef CONFIG_FTTMR010_EXT_CLK
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return CONFIG_SYS_HZ;
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#else
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return CONFIG_SYS_CLK_FREQ;
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return get_board_sys_clk();
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#endif
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}
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#endif /* CONFIG_TIMER */
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@ -8,6 +8,7 @@
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*/
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#include <common.h>
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#include <clock_legacy.h>
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#include <pci.h>
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#include <mpc83xx.h>
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#include <asm/global_data.h>
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@ -46,7 +47,7 @@ int get_pcie_clk(int index)
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clkin_div = ((im->clk.spmr & SPMR_CKID) >> SPMR_CKID_SHIFT);
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sccr = im->clk.sccr;
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pci_sync_in = CONFIG_SYS_CLK_FREQ / (1 + clkin_div);
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pci_sync_in = get_board_sys_clk() / (1 + clkin_div);
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spmf = (im->clk.spmr & SPMR_SPMF) >> SPMR_SPMF_SHIFT;
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csb_clk = pci_sync_in * (1 + clkin_div) * spmf;
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@ -137,8 +137,8 @@ int get_clocks(void)
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clkin_div = ((im->clk.spmr & SPMR_CKID) >> SPMR_CKID_SHIFT);
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if (im->reset.rcwh & HRCWH_PCI_HOST) {
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#if defined(CONFIG_SYS_CLK_FREQ)
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pci_sync_in = CONFIG_SYS_CLK_FREQ / (1 + clkin_div);
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#if CONFIG_SYS_CLK_FREQ != 0
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pci_sync_in = get_board_sys_clk() / (1 + clkin_div);
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#else
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pci_sync_in = 0xDEADBEEF;
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#endif
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@ -102,5 +102,5 @@ ulong get_bus_freq(ulong dummy)
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volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
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u8 spmf = (im->clk.spmr & SPMR_SPMF) >> SPMR_SPMF_SHIFT;
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return CONFIG_SYS_CLK_FREQ * spmf;
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return get_board_sys_clk() * spmf;
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}
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@ -662,9 +662,9 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
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#ifdef CONFIG_FSL_CORENET
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do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
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"clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
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"clock-frequency", get_board_sys_clk(), 1);
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do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0",
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"clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
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"clock-frequency", get_board_sys_clk(), 1);
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do_fixup_by_compat_u32(blob, "fsl,mpic",
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"clock-frequency", get_bus_freq(0)/2, 1);
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#else
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@ -75,7 +75,7 @@ void get_sys_info(sys_info_t *sys_info)
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uint rcw_tmp;
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#endif
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uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS];
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unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
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unsigned long sysclk = get_board_sys_clk();
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uint mem_pll_rat;
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sys_info->freq_systembus = sysclk;
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@ -102,7 +102,7 @@ void get_sys_info(sys_info_t *sys_info)
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* are driven by differential sysclock.
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*/
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if (ddr_refclk_sel == FSL_CORENET2_RCWSR5_DDR_REFCLK_SINGLE_CLK)
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sys_info->freq_ddrbus = CONFIG_SYS_CLK_FREQ;
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sys_info->freq_ddrbus = get_board_sys_clk();
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else
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#endif
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#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
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@ -526,7 +526,7 @@ void get_sys_info(sys_info_t *sys_info)
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plat_ratio = (gur->porpllsr) & 0x0000003e;
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plat_ratio >>= 1;
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sys_info->freq_systembus = plat_ratio * CONFIG_SYS_CLK_FREQ;
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sys_info->freq_systembus = plat_ratio * get_board_sys_clk();
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/* Divide before multiply to avoid integer
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* overflow for processor speeds above 2GHz */
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@ -554,7 +554,7 @@ void get_sys_info(sys_info_t *sys_info)
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#else
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qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO)
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>> MPC85xx_PORPLLSR_QE_RATIO_SHIFT;
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sys_info->freq_qe = qe_ratio * CONFIG_SYS_CLK_FREQ;
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sys_info->freq_qe = qe_ratio * get_board_sys_clk();
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#endif
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#endif
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@ -11,6 +11,6 @@
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/* Timer */
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#define CONFIG_SYS_TIMER_COUNTS_DOWN
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#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
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#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4)
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#define CONFIG_SYS_TIMER_RATE (get_board_sys_clk() / 4)
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#endif
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@ -4,6 +4,7 @@
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*/
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#include <common.h>
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#include <clock_legacy.h>
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#include <time.h>
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#include <asm/global_data.h>
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#include <linux/delay.h>
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@ -51,7 +52,7 @@ static void delay_cycles(unsigned cycles)
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void __udelay(unsigned long usec)
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{
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ulong lo, hi, i;
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ulong mhz = CONFIG_SYS_CLK_FREQ / 1000000;
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ulong mhz = get_board_sys_clk() / 1000000;
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/* Scale to support full 32-bit usec range */
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@ -74,7 +75,7 @@ ulong get_timer(ulong base)
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#if XCHAL_HAVE_CCOUNT
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register ulong ccount;
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__asm__ volatile ("rsr %0, CCOUNT" : "=a"(ccount));
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return ccount / (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - base;
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return ccount / (get_board_sys_clk() / CONFIG_SYS_HZ) - base;
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#else
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/*
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* Add at least the overhead of this call (in cycles).
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@ -85,7 +86,7 @@ ulong get_timer(ulong base)
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*/
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|
||||
fake_ccount += 20;
|
||||
return fake_ccount / (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - base;
|
||||
return fake_ccount / (get_board_sys_clk() / CONFIG_SYS_HZ) - base;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -114,6 +115,6 @@ unsigned long timer_get_us(void)
|
|||
unsigned long ccount;
|
||||
|
||||
__asm__ volatile ("rsr %0, CCOUNT" : "=a"(ccount));
|
||||
return ccount / (CONFIG_SYS_CLK_FREQ / 1000000);
|
||||
return ccount / (get_board_sys_clk() / 1000000);
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <command.h>
|
||||
#include <dm.h>
|
||||
#include <init.h>
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
|
||||
|
||||
#include <common.h>
|
||||
|
||||
#include <clock_legacy.h>
|
||||
|
||||
/*
|
||||
* CADMUS Board System Registers
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <log.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <i2c.h>
|
||||
#include <fdt_support.h>
|
||||
#include <fsl_ddr_sdram.h>
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <i2c.h>
|
||||
#include <fdt_support.h>
|
||||
#include <fsl_ddr_sdram.h>
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
* Copyright 2017-2018 NXP
|
||||
*/
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <env.h>
|
||||
#include <i2c.h>
|
||||
#include <init.h>
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
* Copyright 2015 Freescale Semiconductor
|
||||
*/
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <env.h>
|
||||
#include <init.h>
|
||||
#include <malloc.h>
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
* Copyright 2017 NXP
|
||||
*/
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <env.h>
|
||||
#include <init.h>
|
||||
#include <malloc.h>
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@ void board_init_f(ulong bootflag)
|
|||
/* initialize selected port with appropriate baud rate */
|
||||
plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
|
||||
plat_ratio >>= 1;
|
||||
gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
|
||||
gd->bus_clk = get_board_sys_clk() * plat_ratio;
|
||||
|
||||
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
|
||||
gd->bus_clk / 16 / CONFIG_BAUDRATE);
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
* Copyright 2011 Freescale Semiconductor, Inc.
|
||||
*/
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <init.h>
|
||||
#include <mpc85xx.h>
|
||||
#include <asm/io.h>
|
||||
|
|
@ -29,7 +30,7 @@ void board_init_f(ulong bootflag)
|
|||
/* initialize selected port with appropriate baud rate */
|
||||
plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
|
||||
plat_ratio >>= 1;
|
||||
gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
|
||||
gd->bus_clk = get_board_sys_clk() * plat_ratio;
|
||||
|
||||
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
|
||||
gd->bus_clk / 16 / CONFIG_BAUDRATE);
|
||||
|
|
|
|||
|
|
@ -48,7 +48,7 @@ void board_init_f(ulong bootflag)
|
|||
/* initialize selected port with appropriate baud rate */
|
||||
plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
|
||||
plat_ratio >>= 1;
|
||||
bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
|
||||
bus_clk = get_board_sys_clk() * plat_ratio;
|
||||
gd->bus_clk = bus_clk;
|
||||
|
||||
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <init.h>
|
||||
#include <ns16550.h>
|
||||
#include <asm/io.h>
|
||||
|
|
@ -28,7 +29,7 @@ void board_init_f(ulong bootflag)
|
|||
/* initialize selected port with appropriate baud rate */
|
||||
plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
|
||||
plat_ratio >>= 1;
|
||||
gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
|
||||
gd->bus_clk = get_board_sys_clk() * plat_ratio;
|
||||
|
||||
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
|
||||
gd->bus_clk / 16 / CONFIG_BAUDRATE);
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <command.h>
|
||||
#include <env.h>
|
||||
#include <fdt_support.h>
|
||||
|
|
|
|||
|
|
@ -69,7 +69,7 @@ void board_init_f(ulong bootflag)
|
|||
#endif
|
||||
|
||||
/* initialize selected port with appropriate baud rate */
|
||||
sys_clk = CONFIG_SYS_CLK_FREQ;
|
||||
sys_clk = get_board_sys_clk();
|
||||
plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
|
||||
ccb_clk = sys_clk * plat_ratio / 2;
|
||||
|
||||
|
|
|
|||
|
|
@ -68,7 +68,7 @@ void board_init_f(ulong bootflag)
|
|||
console_init_f();
|
||||
|
||||
/* initialize selected port with appropriate baud rate */
|
||||
sys_clk = CONFIG_SYS_CLK_FREQ;
|
||||
sys_clk = get_board_sys_clk();
|
||||
plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
|
||||
uart_clk = sys_clk * plat_ratio / 2;
|
||||
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <command.h>
|
||||
#include <env.h>
|
||||
#include <fdt_support.h>
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@ void board_init_f(ulong bootflag)
|
|||
console_init_f();
|
||||
|
||||
/* initialize selected port with appropriate baud rate */
|
||||
sys_clk = CONFIG_SYS_CLK_FREQ;
|
||||
sys_clk = get_board_sys_clk();
|
||||
plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
|
||||
ccb_clk = sys_clk * plat_ratio / 2;
|
||||
|
||||
|
|
|
|||
|
|
@ -47,7 +47,7 @@ void board_init_f(ulong bootflag)
|
|||
console_init_f();
|
||||
|
||||
/* initialize selected port with appropriate baud rate */
|
||||
sys_clk = CONFIG_SYS_CLK_FREQ;
|
||||
sys_clk = get_board_sys_clk();
|
||||
plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
|
||||
ccb_clk = sys_clk * plat_ratio / 2;
|
||||
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <cpu_func.h>
|
||||
#include <hang.h>
|
||||
#include <init.h>
|
||||
|
|
@ -50,7 +51,7 @@ void s_init(void)
|
|||
writel(0xA5A5A500, &swdt->swtcsra);
|
||||
|
||||
/* CPU frequency setting. Set to 0.8GHz */
|
||||
stc = ((800 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_OFFSET;
|
||||
stc = ((800 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_OFFSET;
|
||||
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <cpu_func.h>
|
||||
#include <env.h>
|
||||
#include <hang.h>
|
||||
|
|
@ -45,7 +46,7 @@ void s_init(void)
|
|||
writel(0xA5A5A500, &swdt->swtcsra);
|
||||
|
||||
/* CPU frequency setting. Set to 1.5GHz */
|
||||
stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
|
||||
stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT;
|
||||
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
|
||||
|
||||
/* QoS */
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <cpu_func.h>
|
||||
#include <env.h>
|
||||
#include <hang.h>
|
||||
|
|
@ -47,7 +48,7 @@ void s_init(void)
|
|||
writel(0xA5A5A500, &swdt->swtcsra);
|
||||
|
||||
/* CPU frequency setting. Set to 1.5GHz */
|
||||
stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
|
||||
stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT;
|
||||
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
|
||||
|
||||
/* QoS */
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <cpu_func.h>
|
||||
#include <env.h>
|
||||
#include <env_internal.h>
|
||||
|
|
@ -50,7 +51,7 @@ void s_init(void)
|
|||
/* CPU frequency setting. Set to 1.4GHz */
|
||||
if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
|
||||
u32 stat = 0;
|
||||
u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1)
|
||||
u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1)
|
||||
<< PLL0_STC_BIT;
|
||||
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
|
||||
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <cpu_func.h>
|
||||
#include <env.h>
|
||||
#include <hang.h>
|
||||
|
|
@ -47,7 +48,7 @@ void s_init(void)
|
|||
writel(0xA5A5A500, &swdt->swtcsra);
|
||||
|
||||
/* CPU frequency setting. Set to 1.5GHz */
|
||||
stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
|
||||
stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT;
|
||||
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
|
||||
|
||||
/* QoS */
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <env.h>
|
||||
#include <init.h>
|
||||
#include <malloc.h>
|
||||
|
|
@ -50,7 +51,7 @@ void s_init(void)
|
|||
/* CPU frequency setting. Set to 1.4GHz */
|
||||
if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
|
||||
u32 stat = 0;
|
||||
u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1)
|
||||
u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1)
|
||||
<< PLL0_STC_BIT;
|
||||
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
|
||||
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@ int checkboard (void)
|
|||
/* Check the PCI_clk sel bit */
|
||||
if (in_be32(&gur->porpllsr) & (1<<15)) {
|
||||
src = "SYSCLK";
|
||||
f = CONFIG_SYS_CLK_FREQ;
|
||||
f = get_board_sys_clk();
|
||||
} else {
|
||||
src = "PCI_CLK";
|
||||
f = CONFIG_PCI_CLK_FREQ;
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <dm.h>
|
||||
#include <env.h>
|
||||
#include <hang.h>
|
||||
|
|
@ -667,7 +668,7 @@ void sunxi_board_init(void)
|
|||
* assured it's being powered with suitable core voltage
|
||||
*/
|
||||
if (!power_failed)
|
||||
clock_set_pll1(CONFIG_SYS_CLK_FREQ);
|
||||
clock_set_pll1(get_board_sys_clk());
|
||||
else
|
||||
printf("Failed to set core voltage! Can't set CPU frequency\n");
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clock_legacy.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
/*
|
||||
|
|
|
|||
24
boot/Kconfig
24
boot/Kconfig
|
|
@ -358,11 +358,27 @@ config SYS_TEXT_BASE
|
|||
help
|
||||
The address in memory that U-Boot will be running from, initially.
|
||||
|
||||
config SYS_CLK_FREQ
|
||||
depends on ARC || ARCH_SUNXI || MPC83xx
|
||||
int "CPU clock frequency"
|
||||
config DYNAMIC_SYS_CLK_FREQ
|
||||
bool "Determine CPU clock frequency at run-time"
|
||||
help
|
||||
TODO: Move CONFIG_SYS_CLK_FREQ for all the architecture
|
||||
Implement a get_board_sys_clk function that will determine the CPU
|
||||
clock frequency at run time, rather than define it statically.
|
||||
|
||||
config SYS_CLK_FREQ
|
||||
depends on !DYNAMIC_SYS_CLK_FREQ
|
||||
int "CPU clock frequency"
|
||||
default 125000000 if ARCH_LS1012A
|
||||
default 100000000 if ARCH_P2020 || ARCH_T1024 || ARCH_T1042 || \
|
||||
ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
|
||||
default 66666666 if ARCH_P1010 || ARCH_P1020 || ARCH_T4240
|
||||
default 66660000 if ARCH_T2080
|
||||
default 33333333 if RCAR_GEN3
|
||||
default 24000000 if ARCH_EXYNOS
|
||||
default 20000000 if RCAR_GEN2
|
||||
default 0
|
||||
help
|
||||
A static value for the CPU frequency. Note that if not required
|
||||
for a given SoC, this can be left at 0.
|
||||
|
||||
config ARCH_FIXUP_FDT_MEMORY
|
||||
bool "Enable arch_fixup_memory_banks() call"
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
|
|||
CONFIG_PHYS_64BIT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@ CONFIG_TARGET_MPC8548CDS=y
|
|||
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@ CONFIG_FIT=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg"
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg"
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg"
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@ CONFIG_FIT=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@ CONFIG_FIT=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg"
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg"
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg"
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@ CONFIG_FIT=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p4080ds.cfg"
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p4080ds.cfg"
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@ CONFIG_FIT=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@ CONFIG_FIT=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg"
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg"
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg"
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@ CONFIG_FIT=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@ CONFIG_FIT=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_nand_rcw.cfg"
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_sd_rcw.cfg"
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@ CONFIG_FIT=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
|
||||
|
|
|
|||
|
|
@ -24,6 +24,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_spi_rcw.cfg"
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@ CONFIG_FIT=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@ CONFIG_ENV_SIZE=0x2000
|
|||
CONFIG_ENV_OFFSET=0x140000
|
||||
CONFIG_ENV_SECT_SIZE=0x1000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="ae3xx"
|
||||
CONFIG_SYS_CLK_FREQ=39062500
|
||||
CONFIG_TARGET_ADP_AE3XX=y
|
||||
CONFIG_SYS_LOAD_ADDR=0x300000
|
||||
CONFIG_FIT=y
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@ CONFIG_NR_DRAM_BANKS=2
|
|||
CONFIG_ENV_SIZE=0x2000
|
||||
CONFIG_ENV_SECT_SIZE=0x20000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="ag101p"
|
||||
CONFIG_SYS_CLK_FREQ=39062500
|
||||
CONFIG_TARGET_ADP_AG101P=y
|
||||
CONFIG_SYS_LOAD_ADDR=0x300000
|
||||
CONFIG_FIT=y
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@ CONFIG_ENV_SECT_SIZE=0x20000
|
|||
CONFIG_ARCH_RMOBILE_BOARD_STRING="Armadillo-800EVA Board"
|
||||
CONFIG_R8A7740=y
|
||||
CONFIG_TARGET_ARMADILLO_800EVA=y
|
||||
CONFIG_SYS_CLK_FREQ=50000000
|
||||
CONFIG_SYS_LOAD_ADDR=0x44000000
|
||||
CONFIG_BOOTDELAY=3
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
|
|
|
|||
|
|
@ -24,6 +24,7 @@ CONFIG_SPL_SPI=y
|
|||
CONFIG_LTO=y
|
||||
CONFIG_SYS_LOAD_ADDR=0xc0700000
|
||||
CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
CONFIG_BOOTCOMMAND="run envboot; run mmcboot; "
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@ CONFIG_DM_GPIO=y
|
|||
CONFIG_DEFAULT_DEVICE_TREE="da850-evm"
|
||||
CONFIG_LTO=y
|
||||
CONFIG_SYS_LOAD_ADDR=0xc0700000
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@ CONFIG_SPL_SPI=y
|
|||
CONFIG_LTO=y
|
||||
CONFIG_SYS_LOAD_ADDR=0xc0700000
|
||||
CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
CONFIG_BOOTCOMMAND="run envboot; run mmcboot; "
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@ CONFIG_ENV_SECT_SIZE=0x10000
|
|||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="r7s72100-gr-peach-u-boot"
|
||||
CONFIG_RZA1=y
|
||||
CONFIG_SYS_CLK_FREQ=66666666
|
||||
CONFIG_SYS_LOAD_ADDR=0x20400000
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@ CONFIG_ENV_SIZE=0x4000
|
|||
CONFIG_ENV_SECT_SIZE=0x20000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="kmcent2"
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020
|
||||
CONFIG_SYS_CLK_FREQ=66666666
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_KMCENT2=y
|
||||
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=1
|
|||
CONFIG_ENV_SIZE=0x4000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="da850-lego-ev3"
|
||||
CONFIG_SYS_LOAD_ADDR=0xc0700000
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=0
|
||||
CONFIG_AUTOBOOT_KEYED=y
|
||||
CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds - press 'l' to stop...\n"
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@ CONFIG_FIT=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_SILENT_CONSOLE=y
|
||||
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_SILENT_CONSOLE=y
|
||||
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg"
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@ CONFIG_FIT=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_SILENT_CONSOLE=y
|
||||
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@ CONFIG_FIT=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_SILENT_CONSOLE=y
|
||||
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@ CONFIG_FIT_VERBOSE=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_SILENT_CONSOLE=y
|
||||
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@ CONFIG_AHCI=y
|
|||
CONFIG_SYS_LOAD_ADDR=0x82000000
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg"
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@ CONFIG_AHCI=y
|
|||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
|
||||
|
|
|
|||
|
|
@ -24,6 +24,7 @@ CONFIG_DISTRO_DEFAULTS=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@ CONFIG_DISTRO_DEFAULTS=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043aqds/ls1043aqds_pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043aqds/ls1043aqds_rcw_nand.cfg"
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@ CONFIG_AHCI=y
|
|||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
|
||||
|
|
|
|||
|
|
@ -24,6 +24,7 @@ CONFIG_AHCI=y
|
|||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_QSPI_BOOT=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@ CONFIG_AHCI=y
|
|||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043aqds/ls1043aqds_pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg"
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@ CONFIG_AHCI=y
|
|||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_RAMBOOT_PBL=y
|
||||
CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043aqds/ls1043aqds_pbi.cfg"
|
||||
CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043aqds/ls1043aqds_rcw_sd_qspi.cfg"
|
||||
|
|
|
|||
|
|
@ -25,6 +25,7 @@ CONFIG_AHCI=y
|
|||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@ CONFIG_AHCI=y
|
|||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@ CONFIG_AHCI=y
|
|||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@ CONFIG_AHCI=y
|
|||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
|
||||
|
|
|
|||
|
|
@ -24,6 +24,7 @@ CONFIG_DISTRO_DEFAULTS=y
|
|||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
|
||||
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue