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https://github.com/AsahiLinux/u-boot
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ARM: omap24xx: remove remainders of dead board
Since Commit 7f5eef9
removed OMAP2420H4 support,
arm1136/omap24xx has not been used at all.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This commit is contained in:
parent
a704a6d615
commit
2f6af82719
3 changed files with 0 additions and 193 deletions
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(SOC).o
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SOBJS = reset.o
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COBJS = timer.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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all: $(obj).depend $(LIB)
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$(LIB): $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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/*
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* armboot - Startup Code for OMP2420/ARM1136 CPU-core
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*
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* Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
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*
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* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
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* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
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* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
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* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
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* Copyright (c) 2003 Kshitij <kshitij@ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/arch/omap2420.h>
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.globl reset_cpu
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reset_cpu:
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ldr r1, rstctl /* get addr for global reset reg */
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mov r3, #0x2 /* full reset pll+mpu */
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str r3, [r1] /* force reset */
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mov r0, r0
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_loop_forever:
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b _loop_forever
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rstctl:
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.word PM_RSTCTRL_WKUP
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@ -1,136 +0,0 @@
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/*
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* (C) Copyright 2004
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* Texas Instruments
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* Richard Woodruff <r-woodruff2@ti.com>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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* Alex Zuepke <azu@sysgo.de>
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/bits.h>
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#include <asm/arch/omap2420.h>
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#define TIMER_CLOCK (CONFIG_SYS_CLK_FREQ / (2 << CONFIG_SYS_PTV))
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#define TIMER_LOAD_VAL 0
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/* macro to read the 32 bit timer */
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#define READ_TIMER readl(CONFIG_SYS_TIMERBASE+TCRR) \
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/ (TIMER_CLOCK / CONFIG_SYS_HZ)
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DECLARE_GLOBAL_DATA_PTR;
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int timer_init (void)
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{
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int32_t val;
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/* Start the counter ticking up */
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*((int32_t *) (CONFIG_SYS_TIMERBASE + TLDR)) = TIMER_LOAD_VAL; /* reload value on overflow*/
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val = (CONFIG_SYS_PTV << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/
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*((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val; /* start timer */
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/* reset time */
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gd->arch.lastinc = READ_TIMER; /* capture current incrementer value */
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gd->arch.tbl = 0; /* start "advancing" time stamp */
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return(0);
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}
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/*
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* timer without interrupts
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*/
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ulong get_timer (ulong base)
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{
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return get_timer_masked () - base;
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}
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/* delay x useconds AND preserve advance timestamp value */
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void __udelay (unsigned long usec)
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{
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ulong tmo, tmp;
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if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
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tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
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tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
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tmo /= 1000; /* finish normalize. */
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} else { /* else small number, don't kill it prior to HZ multiply */
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tmo = usec * CONFIG_SYS_HZ;
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tmo /= (1000*1000);
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}
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tmp = get_timer (0); /* get current timestamp */
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if ((tmo + tmp + 1) < tmp) { /* if setting this forward will roll */
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/* time stamp, then reset time */
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gd->arch.lastinc = READ_TIMER; /* capture incrementer value */
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gd->arch.tbl = 0; /* start time stamp */
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} else {
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tmo += tmp; /* else, set advancing stamp wake up time */
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}
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while (get_timer_masked () < tmo)/* loop till event */
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/*NOP*/;
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}
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ulong get_timer_masked (void)
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{
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ulong now = READ_TIMER; /* current tick value */
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if (now >= gd->arch.lastinc) { /* normal mode (non roll) */
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/* move stamp fordward with absoulte diff ticks */
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gd->arch.tbl += (now - gd->arch.lastinc);
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} else {
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/* we have rollover of incrementer */
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gd->arch.tbl += ((0xFFFFFFFF / (TIMER_CLOCK / CONFIG_SYS_HZ))
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- gd->arch.lastinc) + now;
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}
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gd->arch.lastinc = now;
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return gd->arch.tbl;
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}
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/* waits specified delay value and resets timestamp */
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void udelay_masked (unsigned long usec)
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{
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ulong tmo;
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ulong endtime;
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signed long diff;
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if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
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tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
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tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
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tmo /= 1000; /* finish normalize. */
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} else { /* else small number, don't kill it prior to HZ multiply */
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tmo = usec * CONFIG_SYS_HZ;
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tmo /= (1000*1000);
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}
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endtime = get_timer_masked () + tmo;
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do {
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ulong now = get_timer_masked ();
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diff = endtime - now;
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} while (diff >= 0);
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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*/
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk (void)
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{
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ulong tbclk;
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tbclk = CONFIG_SYS_HZ;
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return tbclk;
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}
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