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powerpc/board/t4240rdb: Enable VID support
The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
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3 changed files with 19 additions and 1 deletions
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@ -42,7 +42,7 @@ int __weak board_vdd_drop_compensation(void)
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* The IR chip can show up under the following addresses:
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* 0x08 (Verified on T1040RDB-PA,T4240RDB-PB,X-T4240RDB-16GPA)
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* 0x09 (Verified on T1040RDB-PA)
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* 0x38 (Verified on T2080QDS, T2081QDS)
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* 0x38 (Verified on T2080QDS, T2081QDS, T4240RDB)
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*/
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static int find_ir_chip_on_i2c(void)
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{
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@ -20,6 +20,7 @@
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#include "t4rdb.h"
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#include "cpld.h"
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#include "../common/vid.h"
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DECLARE_GLOBAL_DATA_PTR;
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@ -74,6 +75,13 @@ int board_early_init_r(void)
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MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
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0, flash_esel, BOOKE_PAGESZ_256M, 1);
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/*
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* Adjust core voltage according to voltage ID
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* This function changes I2C mux to channel 2.
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*/
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if (adjust_vdd(0))
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printf("Warning: Adjusting core voltage failed.\n");
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return 0;
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}
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@ -606,6 +606,16 @@ unsigned long get_board_ddr_clk(void);
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#define I2C_VOL_MONITOR_BUS_V_OVF 0x1
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#define I2C_VOL_MONITOR_BUS_V_SHIFT 3
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#define CONFIG_VID_FLS_ENV "t4240rdb_vdd_mv"
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_VID
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#endif
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#define CONFIG_VOL_MONITOR_IR36021_SET
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#define CONFIG_VOL_MONITOR_IR36021_READ
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/* The lowest and highest voltage allowed for T4240RDB */
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#define VDD_MV_MIN 819
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#define VDD_MV_MAX 1212
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/*
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* eSPI - Enhanced SPI
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*/
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