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imx-common: enlarge mux width to 4
For i.MX6, the mux width is 4, not 3. So enlarge the width. IOMUX_CONFIG_LPSR is changed from 0x8 to 0x20 to not use bit 3 of mux. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
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81c4eccb55
commit
2ee4065571
1 changed files with 7 additions and 8 deletions
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@ -39,10 +39,9 @@
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* MUX_CTRL_OFS: 0..11 (12)
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* PAD_CTRL_OFS: 12..23 (12)
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* SEL_INPUT_OFS: 24..35 (12)
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* MUX_MODE + SION: 36..40 (5)
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* PAD_CTRL + NO_PAD_CTRL: 41..58 (18)
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* SEL_INP: 59..62 (4)
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* reserved: 63 (1)
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* MUX_MODE + SION + LPSR: 36..41 (6)
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* PAD_CTRL + NO_PAD_CTRL: 42..59 (18)
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* SEL_INP: 60..63 (4)
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*/
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typedef u64 iomux_v3_cfg_t;
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@ -57,10 +56,10 @@ typedef u64 iomux_v3_cfg_t;
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MUX_SEL_INPUT_OFS_SHIFT)
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#define MUX_MODE_SHIFT 36
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#define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT)
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#define MUX_PAD_CTRL_SHIFT 41
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#define MUX_MODE_MASK ((iomux_v3_cfg_t)0x3f << MUX_MODE_SHIFT)
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#define MUX_PAD_CTRL_SHIFT 42
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#define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x3ffff << MUX_PAD_CTRL_SHIFT)
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#define MUX_SEL_INPUT_SHIFT 59
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#define MUX_SEL_INPUT_SHIFT 60
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#define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT)
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#define MUX_MODE_SION ((iomux_v3_cfg_t)IOMUX_CONFIG_SION << \
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@ -85,7 +84,7 @@ typedef u64 iomux_v3_cfg_t;
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#define NO_PAD_CTRL (1 << 17)
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#define IOMUX_CONFIG_LPSR 0x8
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#define IOMUX_CONFIG_LPSR 0x20
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#define MUX_MODE_LPSR ((iomux_v3_cfg_t)IOMUX_CONFIG_LPSR << \
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MUX_MODE_SHIFT)
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#ifdef CONFIG_MX7
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