From 2ed192361eb33f214fa32f16c4f8ccb05ff28331 Mon Sep 17 00:00:00 2001
From: Hai Pham <hai.pham.ud@renesas.com>
Date: Tue, 28 Feb 2023 22:37:05 +0100
Subject: [PATCH] ARM: dts: renesas: Add R8A779G0 V4H DT extras

Add R8A779G0 V4H DT extras for U-Boot.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update compatible string to match latest upstream]
---
 arch/arm/dts/r8a779g0-u-boot.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
 create mode 100644 arch/arm/dts/r8a779g0-u-boot.dtsi

diff --git a/arch/arm/dts/r8a779g0-u-boot.dtsi b/arch/arm/dts/r8a779g0-u-boot.dtsi
new file mode 100644
index 0000000000..150657fad5
--- /dev/null
+++ b/arch/arm/dts/r8a779g0-u-boot.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot on R-Car R8A779G0 SoC
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+#include "r8a779x-u-boot.dtsi"
+
+/ {
+	soc {
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a779g0-rpc-if", "renesas,rcar-gen4-rpc-if";
+			reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>;
+			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 629>;
+			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
+			resets = <&cpg 629>;
+			bank-width = <2>;
+			num-cs = <1>;
+			status = "disabled";
+		};
+	};
+};
+
+&extalr_clk {
+	bootph-all;
+};