Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2025-02-17 22:49:02 +00:00
Code Issues Projects Releases Packages Wiki Activity

arm: mvebu: a37x: Detect CONFIG_SYS_TCLK from SAR register

Browse source 
Bit 20 in SAR register specifies if TCLK is running at 200 MHz or 166 MHz.
Use this information instead of manual configuration in every board file.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Pali Rohár 2021-07-31 14:22:53 +02:00 • committed by Stefan Roese
parent 29795302b9
commit 2ddf554b86
2 changed files with 3 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
arch/arm/mach-mvebu/include/mach/soc.h
View file

@ -145,6 +145,9 @@
#define BOOT_FROM_UART 0x30
#define BOOT_FROM_SPI 0x38
#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(20)) ? \
200000000 : 166000000)
#elif defined(CONFIG_ARMADA_38X)
/* SAR values for Armada 38x */
#define CONFIG_SAR_REG (MVEBU_REGISTER(0x18600))

1
include/configs/db-88f6720.h
View file

@ -15,7 +15,6 @@
* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
/* I2C */
#define CONFIG_SYS_I2C_LEGACY