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https://github.com/AsahiLinux/u-boot
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Convert CONFIG_SYS_PMAN et al to Kconfig
This converts the following to Kconfig: CONFIG_NOBQFMAN CONFIG_SYS_DPAA_DCE CONFIG_SYS_DPAA_FMAN CONFIG_SYS_DPAA_PME CONFIG_SYS_DPAA_RMAN CONFIG_SYS_PMAN Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
ecc8d425fd
commit
2db82bf2bd
16 changed files with 45 additions and 41 deletions
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@ -251,3 +251,6 @@ config QIXIS_I2C_ACCESS
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config HAS_FSL_DR_USB
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def_bool y
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depends on USB_EHCI_HCD && PPC
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config SYS_DPAA_FMAN
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bool
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@ -69,6 +69,7 @@ config ARCH_LS1043A
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select GICV2
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select HAS_FSL_XHCI_USB if USB_HOST
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select SKIP_LOWLEVEL_INIT
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select SYS_DPAA_FMAN
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select SYS_FSL_SRDS_1
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select SYS_HAS_SERDES
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select SYS_FSL_DDR
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@ -106,6 +107,7 @@ config ARCH_LS1046A
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select GICV2
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select HAS_FSL_XHCI_USB if USB_HOST
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select SKIP_LOWLEVEL_INIT
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select SYS_DPAA_FMAN
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select SYS_FSL_SRDS_1
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select SYS_HAS_SERDES
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select SYS_FSL_DDR
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@ -24,11 +24,7 @@ void get_sys_info(struct sys_info *sys_info)
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/* rcw_tmp is needed to get FMAN clock, or to get cluster group A
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* mux 2 clock for LS1043A/LS1046A.
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*/
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#if defined(CONFIG_SYS_DPAA_FMAN) || \
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defined(CONFIG_ARCH_LS1046A) || \
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defined(CONFIG_ARCH_LS1043A)
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u32 rcw_tmp;
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#endif
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__maybe_unused u32 rcw_tmp;
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struct ccsr_clk *clk = (void *)(CFG_SYS_FSL_CLK_ADDR);
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unsigned int cpu;
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const u8 core_cplx_pll[8] = {
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@ -96,7 +92,7 @@ void get_sys_info(struct sys_info *sys_info)
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#define HWA_CGA_M1_CLK_SEL 0xe0000000
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#define HWA_CGA_M1_CLK_SHIFT 29
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#ifdef CONFIG_SYS_DPAA_FMAN
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#if defined(CONFIG_SYS_DPAA_FMAN) && !defined(CONFIG_SPL_BUILD)
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rcw_tmp = in_be32(&gur->rcwsr[7]);
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switch ((rcw_tmp & HWA_CGA_M1_CLK_SEL) >> HWA_CGA_M1_CLK_SHIFT) {
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case 2:
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@ -41,7 +41,7 @@ void set_icids(void)
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/* setup general icid offsets */
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set_icid(icid_tbl, icid_tbl_sz);
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#ifdef CONFIG_SYS_DPAA_FMAN
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#if defined(CONFIG_SYS_DPAA_FMAN) && !defined(CONFIG_SPL_BUILD)
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set_fman_icids(fman_icid_tbl, fman_icid_tbl_sz);
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#endif
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}
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@ -59,7 +59,7 @@ struct icid_id_table icid_tbl[] = {
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int icid_tbl_sz = ARRAY_SIZE(icid_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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#if defined(CONFIG_SYS_DPAA_FMAN) && !defined(CONFIG_SPL_BUILD)
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struct fman_icid_id_table fman_icid_tbl[] = {
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/* port id, icid */
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SET_FMAN_ICID_ENTRY(0x02, FSL_DPAA1_STREAM_ID_END),
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@ -58,7 +58,7 @@ struct icid_id_table icid_tbl[] = {
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int icid_tbl_sz = ARRAY_SIZE(icid_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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#if defined(CONFIG_SYS_DPAA_FMAN) && !defined(CONFIG_SPL_BUILD)
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struct fman_icid_id_table fman_icid_tbl[] = {
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/* port id, icid */
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SET_FMAN_ICID_ENTRY(0x02, FSL_DPAA1_STREAM_ID_END),
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@ -252,6 +252,8 @@ config TARGET_KMCENT2
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bool "Support kmcent2"
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select VENDOR_KM
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select FSL_CORENET
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select SYS_DPAA_FMAN
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select SYS_DPAA_PME
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select SYS_L3_SIZE_256KB
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endchoice
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@ -618,6 +620,9 @@ config ARCH_P2041
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select E500MC
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select FSL_LAW
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select SYS_CACHE_SHIFT_6
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select SYS_DPAA_FMAN
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select SYS_DPAA_PME
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select SYS_DPAA_RMAN
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select SYS_FSL_ERRATUM_A004510
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select SYS_FSL_ERRATUM_A004849
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select SYS_FSL_ERRATUM_A005275
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@ -762,6 +767,7 @@ config ARCH_T1024
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select FSL_CORENET
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select FSL_LAW
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select SYS_CACHE_SHIFT_6
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select SYS_DPAA_FMAN
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select SYS_FSL_DDR_VER_50
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select SYS_FSL_ERRATUM_A008378
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select SYS_FSL_ERRATUM_A008109
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@ -792,6 +798,8 @@ config ARCH_T1040
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select FSL_CORENET
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select FSL_LAW
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select SYS_CACHE_SHIFT_6
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select SYS_DPAA_FMAN
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select SYS_DPAA_PME
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select SYS_FSL_DDR_VER_50
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select SYS_FSL_ERRATUM_A008044
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select SYS_FSL_ERRATUM_A008378
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@ -822,6 +830,8 @@ config ARCH_T1042
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select FSL_CORENET
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select FSL_LAW
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select SYS_CACHE_SHIFT_6
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select SYS_DPAA_FMAN
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select SYS_DPAA_PME
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select SYS_FSL_DDR_VER_50
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select SYS_FSL_ERRATUM_A008044
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select SYS_FSL_ERRATUM_A008378
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@ -851,6 +861,10 @@ config ARCH_T2080
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select FSL_CORENET
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select FSL_LAW
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select SYS_CACHE_SHIFT_6
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select SYS_DPAA_DCE if !NOBQFMAN
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select SYS_DPAA_FMAN if !NOBQFMAN
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select SYS_DPAA_PME if !NOBQFMAN
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select SYS_DPAA_RMAN if !NOBQFMAN
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select SYS_FSL_DDR_VER_47
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select SYS_FSL_ERRATUM_A006379
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select SYS_FSL_ERRATUM_A006593
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@ -871,6 +885,7 @@ config ARCH_T2080
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select SYS_FSL_SRIO_LIODN
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select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN
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select SYS_FSL_USB_DUAL_PHY_ENABLE
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select SYS_PMAN if !NOBQFMAN
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select SYS_PPC64
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select FSL_IFC
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imply CMD_SATA
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@ -886,6 +901,10 @@ config ARCH_T4240
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select FSL_CORENET
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select FSL_LAW
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select SYS_CACHE_SHIFT_6
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select SYS_DPAA_DCE if !NOBQFMAN
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select SYS_DPAA_FMAN if !NOBQFMAN
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select SYS_DPAA_PME if !NOBQFMAN
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select SYS_DPAA_RMAN if !NOBQFMAN
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select SYS_FSL_DDR_VER_47
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select SYS_FSL_ERRATUM_A004468
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select SYS_FSL_ERRATUM_A005871
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@ -907,6 +926,7 @@ config ARCH_T4240
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select SYS_FSL_SRIO_LIODN
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select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN
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select SYS_FSL_USB_DUAL_PHY_ENABLE
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select SYS_PMAN if !NOBQFMAN
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select SYS_PPC64
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select FSL_IFC
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imply CMD_SATA
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@ -947,6 +967,9 @@ config E6500
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help
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Enable PowerPC E6500 core
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config NOBQFMAN
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bool
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config FSL_LAW
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bool
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help
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@ -1019,6 +1042,15 @@ config SYS_CCSRBAR_DEFAULT
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if changed by pre-boot regime. The value here must match
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the current value in SoC. If not sure, do not change.
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config SYS_DPAA_PME
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bool
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config SYS_DPAA_DCE
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bool
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config SYS_DPAA_RMAN
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bool
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config A003399_NOR_WORKAROUND
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bool
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help
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@ -1195,6 +1227,9 @@ config FSL_PCIE_DISABLE_ASPM
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config FSL_PCIE_RESET
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bool
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config SYS_PMAN
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bool
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config SYS_FSL_RAID_ENGINE
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bool
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@ -36,7 +36,6 @@
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#define CONFIG_SRIO1 /* SRIO port 1 */
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#define CONFIG_SRIO2 /* SRIO port 2 */
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#define CONFIG_SRIO_PCIE_BOOT_MASTER
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#define CONFIG_SYS_DPAA_RMAN /* RMan */
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#ifndef __ASSEMBLY__
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#include <linux/stringify.h>
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@ -281,9 +280,6 @@
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#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
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#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08
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#define CONFIG_SYS_DPAA_FMAN
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#define CONFIG_SYS_DPAA_PME
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#ifdef CONFIG_FMAN_ENET
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#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2
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#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x3
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@ -395,8 +395,6 @@
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CONFIG_SYS_QMAN_CENA_SIZE)
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#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
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#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08
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#define CONFIG_SYS_DPAA_FMAN
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#endif /* CONFIG_NOBQFMAN */
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#ifdef CONFIG_SYS_DPAA_FMAN
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@ -366,9 +366,6 @@
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CONFIG_SYS_QMAN_CENA_SIZE)
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#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
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#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08
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#define CONFIG_SYS_DPAA_FMAN
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#define CONFIG_SYS_DPAA_PME
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#endif /* CONFIG_NOBQFMAN */
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#ifdef CONFIG_FMAN_ENET
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@ -388,12 +388,6 @@
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CONFIG_SYS_QMAN_CENA_SIZE)
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#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
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#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08
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#define CONFIG_SYS_DPAA_FMAN
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#define CONFIG_SYS_DPAA_PME
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#define CONFIG_SYS_PMAN
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#define CONFIG_SYS_DPAA_DCE
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#define CONFIG_SYS_DPAA_RMAN /* RMan */
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#endif /* CONFIG_NOBQFMAN */
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#ifdef CONFIG_SYS_DPAA_FMAN
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@ -342,12 +342,6 @@
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CONFIG_SYS_QMAN_CENA_SIZE)
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#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
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#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08
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#define CONFIG_SYS_DPAA_FMAN
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#define CONFIG_SYS_DPAA_PME
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#define CONFIG_SYS_PMAN
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#define CONFIG_SYS_DPAA_DCE
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#define CONFIG_SYS_DPAA_RMAN /* RMan */
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#endif /* CONFIG_NOBQFMAN */
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#ifdef CONFIG_SYS_DPAA_FMAN
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@ -340,12 +340,6 @@
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CONFIG_SYS_QMAN_CENA_SIZE)
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#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
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#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08
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#define CONFIG_SYS_DPAA_FMAN
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#define CONFIG_SYS_DPAA_PME
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#define CONFIG_SYS_PMAN
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#define CONFIG_SYS_DPAA_DCE
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#define CONFIG_SYS_DPAA_RMAN
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#endif /* CONFIG_NOBQFMAN */
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#ifdef CONFIG_SYS_DPAA_FMAN
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@ -372,9 +372,6 @@ int get_scl(void);
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#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
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#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08
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#define CONFIG_SYS_DPAA_FMAN
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#define CONFIG_SYS_DPAA_PME
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/* Qman / Bman */
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/* RGMII (FM1@DTESC5) is local managemant interface */
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#define CONFIG_SYS_RGMII2_PHY_ADDR 0x11
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@ -103,7 +103,6 @@
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/* FMan ucode */
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#ifndef SPL_NO_FMAN
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#define CONFIG_SYS_DPAA_FMAN
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#ifdef CONFIG_SYS_DPAA_FMAN
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#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
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#endif
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@ -67,7 +67,6 @@
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/* FMan ucode */
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#ifndef SPL_NO_FMAN
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#define CONFIG_SYS_DPAA_FMAN
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#ifdef CONFIG_SYS_DPAA_FMAN
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#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
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#endif
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