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board: ge: mx53ppd: Use DM for ethernet

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Remove legacy iomux setup for fec.
Enable phylib and DM fec.
Use Kconfig for enabling fec.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
This commit is contained in:
Robert Beckett 2020-01-31 15:08:00 +02:00 committed by Stefano Babic
parent 92faf43b9c
commit 2d1ea19b55
3 changed files with 3 additions and 34 deletions
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26
board/ge/mx53ppd/mx53ppd.c
View file

@ -98,31 +98,6 @@ int board_ehci_hcd_init(int port)
} }
#endif #endif
static void setup_iomux_fec(void)
{
static const iomux_v3_cfg_t fec_pads[] = {
NEW_PAD_CTRL(MX53_PAD_FEC_MDIO__FEC_MDIO, PAD_CTL_HYS |
PAD_CTL_DSE_HIGH | PAD_CTL_PUS_22K_UP |
PAD_CTL_ODE),
NEW_PAD_CTRL(MX53_PAD_FEC_MDC__FEC_MDC, PAD_CTL_DSE_HIGH),
NEW_PAD_CTRL(MX53_PAD_FEC_RXD1__FEC_RDATA_1,
PAD_CTL_HYS | PAD_CTL_PKE),
NEW_PAD_CTRL(MX53_PAD_FEC_RXD0__FEC_RDATA_0,
PAD_CTL_HYS | PAD_CTL_PKE),
NEW_PAD_CTRL(MX53_PAD_FEC_TXD1__FEC_TDATA_1, PAD_CTL_DSE_HIGH),
NEW_PAD_CTRL(MX53_PAD_FEC_TXD0__FEC_TDATA_0, PAD_CTL_DSE_HIGH),
NEW_PAD_CTRL(MX53_PAD_FEC_TX_EN__FEC_TX_EN, PAD_CTL_DSE_HIGH),
NEW_PAD_CTRL(MX53_PAD_FEC_REF_CLK__FEC_TX_CLK,
PAD_CTL_HYS | PAD_CTL_PKE),
NEW_PAD_CTRL(MX53_PAD_FEC_RX_ER__FEC_RX_ER,
PAD_CTL_HYS | PAD_CTL_PKE),
NEW_PAD_CTRL(MX53_PAD_FEC_CRS_DV__FEC_RX_DV,
PAD_CTL_HYS | PAD_CTL_PKE),
};
imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
}
static int clock_1GHz(void) static int clock_1GHz(void)
{ {
int ret; int ret;
@ -160,7 +135,6 @@ void ppd_gpio_init(void)
int board_early_init_f(void) int board_early_init_f(void)
{ {
setup_iomux_fec();
ppd_gpio_init(); ppd_gpio_init();
return 0; return 0;

3
configs/mx53ppd_defconfig
View file

@ -49,6 +49,9 @@ CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC_IMX=y CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX5=y CONFIG_PINCTRL_IMX5=y

8
include/configs/mx53ppd.h
View file

@ -28,12 +28,6 @@
#define CONFIG_MXC_UART #define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE #define CONFIG_MXC_UART_BASE UART1_BASE
/* Eth Configs */
#define CONFIG_FEC_MXC
#define IMX_FEC_BASE FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x1F
/* USB Configs */ /* USB Configs */
#define CONFIG_USB_HOST_ETHER #define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX #define CONFIG_USB_ETHER_ASIX
@ -49,8 +43,6 @@
/* Command definition */ /* Command definition */
#define CONFIG_ETHPRIME "FEC0"
#define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
#define PPD_CONFIG_NFS \ #define PPD_CONFIG_NFS \