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board: stm32f429-disco: switch to DM STM32 serial driver

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Remove serial_stm32.c driver and uart init from board file,
use available DM serial_stm32x7.c driver compatible for
STM32F4/F7 and H7 SoCs.

The serial_stm32x7.c driver will be renamed later with a more
generic name as it's shared with all STM32 Socs.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This commit is contained in:
Patrice Chotard 2017-12-12 09:49:37 +01:00 committed by Tom Rini
parent a05707004d
commit 2d18d72858
5 changed files with 1 additions and 136 deletions
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8
arch/arm/include/asm/arch-stm32f4/stm32.h
View file

@ -59,14 +59,6 @@ struct stm32_pwr_regs {
#define STM32_PWR_BASE (STM32_APB1PERIPH_BASE + 0x7000) #define STM32_PWR_BASE (STM32_APB1PERIPH_BASE + 0x7000)
#define STM32_PWR ((struct stm32_pwr_regs *)STM32_PWR_BASE) #define STM32_PWR ((struct stm32_pwr_regs *)STM32_PWR_BASE)
/*
* Peripheral base addresses
*/
#define STM32_USART1_BASE (STM32_APB2PERIPH_BASE + 0x1000)
#define STM32_USART2_BASE (STM32_APB1PERIPH_BASE + 0x4400)
#define STM32_USART3_BASE (STM32_APB1PERIPH_BASE + 0x4800)
#define STM32_USART6_BASE (STM32_APB2PERIPH_BASE + 0x1400)
#define FLASH_CNTL_BASE (STM32_AHB1PERIPH_BASE + 0x3C00) #define FLASH_CNTL_BASE (STM32_AHB1PERIPH_BASE + 0x3C00)
static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = { static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {

10
board/st/stm32f429-discovery/stm32f429-discovery.c
View file

@ -17,7 +17,6 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/arch/stm32.h> #include <asm/arch/stm32.h>
#include <asm/arch/gpio.h> #include <asm/arch/gpio.h>
#include <dm/platform_data/serial_stm32.h>
#include <asm/arch/stm32_periph.h> #include <asm/arch/stm32_periph.h>
#include <asm/arch/stm32_defs.h> #include <asm/arch/stm32_defs.h>
@ -168,15 +167,6 @@ int dram_init_banksize(void)
return 0; return 0;
} }
static const struct stm32_serial_platdata serial_platdata = {
.base = (struct stm32_usart *)STM32_USART1_BASE,
};
U_BOOT_DEVICE(stm32_serials) = {
.name = "serial_stm32",
.platdata = &serial_platdata,
};
u32 get_board_rev(void) u32 get_board_rev(void)
{ {
return 0; return 0;

1
configs/stm32f429-discovery_defconfig
View file

@ -27,3 +27,4 @@ CONFIG_RAM=y
CONFIG_STM32_SDRAM=y CONFIG_STM32_SDRAM=y
CONFIG_DM_RESET=y CONFIG_DM_RESET=y
CONFIG_STM32_RESET=y CONFIG_STM32_RESET=y
CONFIG_STM32X7_SERIAL=y

117
drivers/serial/serial_stm32.c
View file

@ -1,117 +0,0 @@
/*
* (C) Copyright 2015
* Kamil Lulko, <kamil.lulko@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <serial.h>
#include <asm/arch/stm32.h>
#include <dm/platform_data/serial_stm32.h>
struct stm32_usart {
u32 sr;
u32 dr;
u32 brr;
u32 cr1;
u32 cr2;
u32 cr3;
u32 gtpr;
};
#define USART_CR1_RE (1 << 2)
#define USART_CR1_TE (1 << 3)
#define USART_CR1_UE (1 << 13)
#define USART_SR_FLAG_RXNE (1 << 5)
#define USART_SR_FLAG_TXE (1 << 7)
#define USART_BRR_F_MASK 0xF
#define USART_BRR_M_SHIFT 4
#define USART_BRR_M_MASK 0xFFF0
DECLARE_GLOBAL_DATA_PTR;
static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
{
struct stm32_serial_platdata *plat = dev->platdata;
struct stm32_usart *const usart = plat->base;
u32 clock, int_div, frac_div, tmp;
if (((u32)usart & STM32_BUS_MASK) == STM32_APB1PERIPH_BASE)
clock = clock_get(CLOCK_APB1);
else if (((u32)usart & STM32_BUS_MASK) == STM32_APB2PERIPH_BASE)
clock = clock_get(CLOCK_APB2);
else
return -EINVAL;
int_div = (25 * clock) / (4 * baudrate);
tmp = ((int_div / 100) << USART_BRR_M_SHIFT) & USART_BRR_M_MASK;
frac_div = int_div - (100 * (tmp >> USART_BRR_M_SHIFT));
tmp |= (((frac_div * 16) + 50) / 100) & USART_BRR_F_MASK;
writel(tmp, &usart->brr);
return 0;
}
static int stm32_serial_getc(struct udevice *dev)
{
struct stm32_serial_platdata *plat = dev->platdata;
struct stm32_usart *const usart = plat->base;
if ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0)
return -EAGAIN;
return readl(&usart->dr);
}
static int stm32_serial_putc(struct udevice *dev, const char c)
{
struct stm32_serial_platdata *plat = dev->platdata;
struct stm32_usart *const usart = plat->base;
if ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
return -EAGAIN;
writel(c, &usart->dr);
return 0;
}
static int stm32_serial_pending(struct udevice *dev, bool input)
{
struct stm32_serial_platdata *plat = dev->platdata;
struct stm32_usart *const usart = plat->base;
if (input)
return readl(&usart->sr) & USART_SR_FLAG_RXNE ? 1 : 0;
else
return readl(&usart->sr) & USART_SR_FLAG_TXE ? 0 : 1;
}
static int stm32_serial_probe(struct udevice *dev)
{
struct stm32_serial_platdata *plat = dev->platdata;
struct stm32_usart *const usart = plat->base;
setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
return 0;
}
static const struct dm_serial_ops stm32_serial_ops = {
.putc = stm32_serial_putc,
.pending = stm32_serial_pending,
.getc = stm32_serial_getc,
.setbrg = stm32_serial_setbrg,
};
U_BOOT_DRIVER(serial_stm32) = {
.name = "serial_stm32",
.id = UCLASS_SERIAL,
.ops = &stm32_serial_ops,
.probe = stm32_serial_probe,
.flags = DM_FLAG_PRE_RELOC,
};

1
include/configs/stm32f429-discovery.h
View file

@ -43,7 +43,6 @@
#define CONFIG_STM32_GPIO #define CONFIG_STM32_GPIO
#define CONFIG_STM32_FLASH #define CONFIG_STM32_FLASH
#define CONFIG_STM32_SERIAL
#define CONFIG_STM32_HSE_HZ 8000000 #define CONFIG_STM32_HSE_HZ 8000000