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ehci-mx5: Add missing OC_DIS for i.MX53

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The i.MX53 has MXC_H*_UCTRL_H*_OC_DIS_BIT bits to disable the oc pin.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Benoît Thébaudeau 2012-11-13 09:57:14 +00:00 committed by Stefano Babic
parent 661052f476
commit 2cfe0b8f13
1 changed files with 24 additions and 0 deletions
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24
drivers/usb/host/ehci-mx5.c
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@ -32,12 +32,14 @@
#define MXC_OTG_OFFSET 0 #define MXC_OTG_OFFSET 0
#define MXC_H1_OFFSET 0x200 #define MXC_H1_OFFSET 0x200
#define MXC_H2_OFFSET 0x400 #define MXC_H2_OFFSET 0x400
#define MXC_H3_OFFSET 0x600
#define MXC_USBCTRL_OFFSET 0 #define MXC_USBCTRL_OFFSET 0
#define MXC_USB_PHY_CTR_FUNC_OFFSET 0x8 #define MXC_USB_PHY_CTR_FUNC_OFFSET 0x8
#define MXC_USB_PHY_CTR_FUNC2_OFFSET 0xc #define MXC_USB_PHY_CTR_FUNC2_OFFSET 0xc
#define MXC_USB_CTRL_1_OFFSET 0x10 #define MXC_USB_CTRL_1_OFFSET 0x10
#define MXC_USBH2CTRL_OFFSET 0x14 #define MXC_USBH2CTRL_OFFSET 0x14
#define MXC_USBH3CTRL_OFFSET 0x18
/* USB_CTRL */ /* USB_CTRL */
/* OTG wakeup intr enable */ /* OTG wakeup intr enable */
@ -58,10 +60,16 @@
#define MXC_H1_OC_DIS_BIT (1 << 5) #define MXC_H1_OC_DIS_BIT (1 << 5)
/* USBH2CTRL */ /* USBH2CTRL */
#define MXC_H2_UCTRL_H2_OC_DIS_BIT (1 << 30)
#define MXC_H2_UCTRL_H2UIE_BIT (1 << 8) #define MXC_H2_UCTRL_H2UIE_BIT (1 << 8)
#define MXC_H2_UCTRL_H2WIE_BIT (1 << 7) #define MXC_H2_UCTRL_H2WIE_BIT (1 << 7)
#define MXC_H2_UCTRL_H2PM_BIT (1 << 4) #define MXC_H2_UCTRL_H2PM_BIT (1 << 4)
/* USBH3CTRL */
#define MXC_H3_UCTRL_H3_OC_DIS_BIT (1 << 30)
#define MXC_H3_UCTRL_H3UIE_BIT (1 << 8)
#define MXC_H3_UCTRL_H3WIE_BIT (1 << 7)
/* USB_CTRL_1 */ /* USB_CTRL_1 */
#define MXC_USB_CTRL_UH1_EXT_CLK_EN (1 << 25) #define MXC_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
@ -202,9 +210,25 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
v &= ~MXC_H2_UCTRL_H2PM_BIT; /* H2 power mask unused */ v &= ~MXC_H2_UCTRL_H2PM_BIT; /* H2 power mask unused */
else else
v |= MXC_H2_UCTRL_H2PM_BIT; /* H2 power mask used */ v |= MXC_H2_UCTRL_H2PM_BIT; /* H2 power mask used */
#endif
#ifdef CONFIG_MX53
if (flags & MXC_EHCI_POWER_PINS_ENABLED)
v &= ~MXC_H2_UCTRL_H2_OC_DIS_BIT; /* OC is used */
else
v |= MXC_H2_UCTRL_H2_OC_DIS_BIT; /* OC is not used */
#endif #endif
__raw_writel(v, usbother_base + MXC_USBH2CTRL_OFFSET); __raw_writel(v, usbother_base + MXC_USBH2CTRL_OFFSET);
break; break;
#ifdef CONFIG_MX53
case 3: /* Host 3 ULPI */
v = __raw_readl(usbother_base + MXC_USBH3CTRL_OFFSET);
if (flags & MXC_EHCI_POWER_PINS_ENABLED)
v &= ~MXC_H3_UCTRL_H3_OC_DIS_BIT; /* OC is used */
else
v |= MXC_H3_UCTRL_H3_OC_DIS_BIT; /* OC is not used */
__raw_writel(v, usbother_base + MXC_USBH3CTRL_OFFSET);
break;
#endif
} }
return ret; return ret;